{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,15]],"date-time":"2026-04-15T19:11:05Z","timestamp":1776280265101,"version":"3.50.1"},"reference-count":11,"publisher":"IEEE","license":[{"start":{"date-parts":[[2020,10,1]],"date-time":"2020-10-01T00:00:00Z","timestamp":1601510400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2020,10,1]],"date-time":"2020-10-01T00:00:00Z","timestamp":1601510400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2020,10]]},"DOI":"10.1109\/iscas45731.2020.9180483","type":"proceedings-article","created":{"date-parts":[[2020,9,29]],"date-time":"2020-09-29T09:22:27Z","timestamp":1601371347000},"page":"1-4","source":"Crossref","is-referenced-by-count":5,"title":["A 32 Gb\/s PAM-4 Optical Transceiver with Active Back Termination in 40 nm CMOS Technology"],"prefix":"10.1109","author":[{"given":"Wei-Hsiang","family":"Ho","sequence":"first","affiliation":[{"name":"National Chiao Tung University, Taiwan"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yi-Hsun","family":"Hsieh","sequence":"additional","affiliation":[{"name":"National Chiao Tung University, Taiwan"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Boris","family":"Murmann","sequence":"additional","affiliation":[{"name":"Stanford University, CA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Wei-Zen","family":"Chen","sequence":"additional","affiliation":[{"name":"National Chiao Tung University, Taiwan"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","first-page":"110","article-title":"A 56Gb\/s PAM-4\/NRZ Transceiver in 40nm CMOS","author":"peng","year":"2017","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2017.2778280"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2016.7417905"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/4.944657"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ASSCC.2018.8579300"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2018.8357008"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/LPT.2018.2841841"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2017.2705070"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2017.2757008"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/LPT.2014.2372041"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2016.2639534"}],"event":{"name":"2020 IEEE International Symposium on Circuits and Systems (ISCAS)","location":"Seville, Spain","start":{"date-parts":[[2020,10,12]]},"end":{"date-parts":[[2020,10,14]]}},"container-title":["2020 IEEE International Symposium on Circuits and Systems (ISCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9179985\/9180369\/09180483.pdf?arnumber=9180483","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,1,15]],"date-time":"2024-01-15T16:02:11Z","timestamp":1705334531000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9180483\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,10]]},"references-count":11,"URL":"https:\/\/doi.org\/10.1109\/iscas45731.2020.9180483","relation":{},"subject":[],"published":{"date-parts":[[2020,10]]}}}