{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,30]],"date-time":"2024-10-30T07:09:45Z","timestamp":1730272185891,"version":"3.28.0"},"reference-count":14,"publisher":"IEEE","license":[{"start":{"date-parts":[[2020,10,1]],"date-time":"2020-10-01T00:00:00Z","timestamp":1601510400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2020,10,1]],"date-time":"2020-10-01T00:00:00Z","timestamp":1601510400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2020,10]]},"DOI":"10.1109\/iscas45731.2020.9180597","type":"proceedings-article","created":{"date-parts":[[2020,9,29]],"date-time":"2020-09-29T13:22:27Z","timestamp":1601385747000},"page":"1-5","source":"Crossref","is-referenced-by-count":2,"title":["A 6.4pJ\/Bit Strong Physical Unclonable Function Based on Multiple-Stage Amplifier Chain"],"prefix":"10.1109","author":[{"given":"Jieyun","family":"Zhang","sequence":"first","affiliation":[{"name":"State Key Laboratory of Analog and Mixed-Signal VLSI and FST-ECE, University of Macau, Macao, China; College of Electronics and Information Engineering, Shenzhen University, Shenzhen, China"}]},{"given":"Xiaojin","family":"Zhao","sequence":"additional","affiliation":[{"name":"College of Electronics and Information Engineering, Shenzhen University, Shenzhen, China"}]},{"given":"Man-Kay","family":"Law","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Analog and Mixed-Signal VLSI and FST-ECE, University of Macau, Macao, China"}]},{"given":"Chongyao","family":"Xu","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Analog and Mixed-Signal VLSI and FST-ECE, University of Macau, Macao, China"}]},{"given":"Jiahao","family":"Liu","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Analog and Mixed-Signal VLSI and FST-ECE, University of Macau, Macao, China"}]},{"given":"Pui-In","family":"Mak","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Analog and Mixed-Signal VLSI and FST-ECE, University of Macau, Macao, China"}]},{"given":"Rui P.","family":"Martins","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Analog and Mixed-Signal VLSI and FST-ECE, University of Macau, Macao, China; Instituto Superior T&#x00E9;cnico, Universidade de Lisboa, Portugal"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"crossref","first-page":"1143","DOI":"10.1109\/TCAD.2015.2424955","article-title":"A low-power hybrid RO PUF with improved thermal stability for lightweight application","volume":"34","author":"cao","year":"2015","journal-title":"IEEE Trans Comput -Aided Design Integr Circuit Syst"},{"journal-title":"Operation and Modeling of the MOS Transistor","year":"1987","author":"tsividis","key":"ref11"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TIFS.2012.2185227"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2120650"},{"key":"ref14","first-page":"1","article-title":"A physically un-clonable function with BER <10?8 for robust chip authentication using oscillator collapse in 40nm CMOS","author":"yang","year":"2015","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/DESEC.2017.8073845"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2004.1346548"},{"key":"ref6","first-page":"9","article-title":"Physical unclonable functions for device authentication and secret key generation","author":"suh","year":"2007","journal-title":"Proc ACM\/IEEE Design Autom Conf"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2008.4681648"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2018.2855061"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.23919\/VLSIC.2017.8008503"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/MCAS.2017.2713305"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2014.2320516"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2017.7870303"}],"event":{"name":"2020 IEEE International Symposium on Circuits and Systems (ISCAS)","start":{"date-parts":[[2020,10,12]]},"location":"Seville, Spain","end":{"date-parts":[[2020,10,14]]}},"container-title":["2020 IEEE International Symposium on Circuits and Systems (ISCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9179985\/9180369\/09180597.pdf?arnumber=9180597","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,1,15]],"date-time":"2024-01-15T21:06:22Z","timestamp":1705352782000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9180597\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,10]]},"references-count":14,"URL":"https:\/\/doi.org\/10.1109\/iscas45731.2020.9180597","relation":{},"subject":[],"published":{"date-parts":[[2020,10]]}}}