{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,8,12]],"date-time":"2025-08-12T21:31:31Z","timestamp":1755034291932,"version":"3.28.0"},"reference-count":19,"publisher":"IEEE","license":[{"start":{"date-parts":[[2020,10,1]],"date-time":"2020-10-01T00:00:00Z","timestamp":1601510400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2020,10,1]],"date-time":"2020-10-01T00:00:00Z","timestamp":1601510400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2020,10]]},"DOI":"10.1109\/iscas45731.2020.9180857","type":"proceedings-article","created":{"date-parts":[[2020,9,29]],"date-time":"2020-09-29T13:22:27Z","timestamp":1601385747000},"page":"1-5","source":"Crossref","is-referenced-by-count":8,"title":["67ppm\/\u00b0C, 66nA PVT Invariant Curvature Compensated Current Reference for Ultra-Low Power Applications"],"prefix":"10.1109","author":[{"given":"Battu Balaji","family":"Yadav","sequence":"first","affiliation":[{"name":"Center for VLSI and Embedded Systems Technology (CVEST), International Institute of Information Technology, Hyderabad (IIIT-H), BlueSemi R&#x0026;D Pvt. Ltd, India - 500032"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Kelam","family":"Mounika","sequence":"additional","affiliation":[{"name":"Center for VLSI and Embedded Systems Technology (CVEST), International Institute of Information Technology, Hyderabad (IIIT-H), BlueSemi R&#x0026;D Pvt. Ltd, India - 500032"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Adithya","family":"Bathi","sequence":"additional","affiliation":[{"name":"Center for VLSI and Embedded Systems Technology (CVEST), International Institute of Information Technology, Hyderabad (IIIT-H), BlueSemi R&#x0026;D Pvt. Ltd, India - 500032"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Zia","family":"Abbas","sequence":"additional","affiliation":[{"name":"Center for VLSI and Embedded Systems Technology (CVEST), International Institute of Information Technology, Hyderabad (IIIT-H), BlueSemi R&#x0026;D Pvt. Ltd, India - 500032"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2019.8702638"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2019.8702293"},{"key":"ref12","volume":"95","author":"wang","year":"2006","journal-title":"Sub-Threshold Design for Ultra Low-Power Systems"},{"key":"ref13","article-title":"Cmos circuit design, layout, and simulation, revised 2nd ed","author":"baker","year":"2004","journal-title":"IEEE Press Series on Microelectronic Systems"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ESSCIRC.2014.6942036"},{"key":"ref15","first-page":"690","article-title":"PVT insensitive reference current generation","volume":"2","author":"shinde","year":"2014","journal-title":"Proceedings of the International MultiConference of Engineers and Computer Scientists"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2016.2531158"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2016.2634779"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2014.6865284"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2015.2415292"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1986.1052572"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/WMCaS.2014.7015875"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ESSCIRC.2010.5619819"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2010.2056051"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ICECS.2017.8292086"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2007.900176"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/DELTA.2008.13"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2204475"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2014.2357031"}],"event":{"name":"2020 IEEE International Symposium on Circuits and Systems (ISCAS)","start":{"date-parts":[[2020,10,12]]},"location":"Seville, Spain","end":{"date-parts":[[2020,10,14]]}},"container-title":["2020 IEEE International Symposium on Circuits and Systems (ISCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9179985\/9180369\/09180857.pdf?arnumber=9180857","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,1,15]],"date-time":"2024-01-15T21:01:33Z","timestamp":1705352493000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9180857\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,10]]},"references-count":19,"URL":"https:\/\/doi.org\/10.1109\/iscas45731.2020.9180857","relation":{},"subject":[],"published":{"date-parts":[[2020,10]]}}}