{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,28]],"date-time":"2025-06-28T07:04:11Z","timestamp":1751094251138},"reference-count":16,"publisher":"IEEE","license":[{"start":{"date-parts":[[2020,10,1]],"date-time":"2020-10-01T00:00:00Z","timestamp":1601510400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2020,10,1]],"date-time":"2020-10-01T00:00:00Z","timestamp":1601510400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2020,10]]},"DOI":"10.1109\/iscas45731.2020.9180924","type":"proceedings-article","created":{"date-parts":[[2020,9,29]],"date-time":"2020-09-29T13:22:27Z","timestamp":1601385747000},"page":"1-5","source":"Crossref","is-referenced-by-count":9,"title":["Supported-BinaryNet: Bitcell Array-Based Weight Supports for Dynamic Accuracy-Energy Trade-Offs in SRAM-Based Binarized Neural Network"],"prefix":"10.1109","author":[{"given":"Shamma","family":"Nasrin","sequence":"first","affiliation":[{"name":"University of Illinois at Chicago, IL, USA"}]},{"given":"Srikanth","family":"Ramakrishna","sequence":"additional","affiliation":[{"name":"University of Illinois at Chicago, IL, USA"}]},{"given":"Theja","family":"Tulabandhula","sequence":"additional","affiliation":[{"name":"University of Illinois at Chicago, IL, USA"}]},{"given":"Amit Ranjan","family":"Trivedi","sequence":"additional","affiliation":[{"name":"University of Illinois at Chicago, IL, USA"}]}],"member":"263","reference":[{"key":"ref10","first-page":"4107","article-title":"Binarized neural networks","author":"hubara","year":"2016","journal-title":"Advances in Neural IInformation Processing Systems"},{"article-title":"Adam: A Method for Stochastic Optimization","year":"2014","author":"kingma","key":"ref11"},{"article-title":"The mnist database of handwritten digits","year":"0","author":"lecun","key":"ref12"},{"key":"ref13","first-page":"3123","article-title":"Binaryconnect: Training deep neural networks with binary weights during propagations","author":"courbariaux","year":"2015","journal-title":"Proceedings of the 28th International Conference on Neural Information Processing Systems - Volume 2 ser NIPS&#x2019;15"},{"key":"ref14","first-page":"195","author":"ketkar","year":"2017","journal-title":"Introduction to PyTorch"},{"key":"ref15","doi-asserted-by":"crossref","first-page":"585","DOI":"10.1109\/ISQED.2006.91","article-title":"New generation of predictive technology model for sub-45nm design exploration","author":"zhao","year":"2006","journal-title":"Proceedings of the 7th International Symposium on Quality Electronic Design ser ISQED &#x2019;06"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2016.2642198"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ICCV.2015.312"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1016\/j.eswa.2009.02.037"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/54.922799"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1016\/j.dcan.2017.10.002"},{"key":"ref8","first-page":"1","article-title":"A machine-learning classifier implemented in a standard 6t sram array","author":"zhang","year":"2016","journal-title":"2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits)"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2014.58"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ICASSP.2013.6639345"},{"key":"ref1","first-page":"1097","article-title":"Imagenet classification with deep convolutional neural networks","author":"krizhevsky","year":"2012","journal-title":"Advances in Neural Information Processing Systems 25"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/3007787.3001140"}],"event":{"name":"2020 IEEE International Symposium on Circuits and Systems (ISCAS)","start":{"date-parts":[[2020,10,12]]},"location":"Seville, Spain","end":{"date-parts":[[2020,10,14]]}},"container-title":["2020 IEEE International Symposium on Circuits and Systems (ISCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9179985\/9180369\/09180924.pdf?arnumber=9180924","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,1,15]],"date-time":"2024-01-15T20:59:45Z","timestamp":1705352385000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9180924\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,10]]},"references-count":16,"URL":"https:\/\/doi.org\/10.1109\/iscas45731.2020.9180924","relation":{},"subject":[],"published":{"date-parts":[[2020,10]]}}}