{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,30]],"date-time":"2024-10-30T07:12:39Z","timestamp":1730272359966,"version":"3.28.0"},"reference-count":5,"publisher":"IEEE","license":[{"start":{"date-parts":[[2020,10,1]],"date-time":"2020-10-01T00:00:00Z","timestamp":1601510400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2020,10,1]],"date-time":"2020-10-01T00:00:00Z","timestamp":1601510400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2020,10]]},"DOI":"10.1109\/iscas45731.2020.9181006","type":"proceedings-article","created":{"date-parts":[[2020,9,29]],"date-time":"2020-09-29T13:22:27Z","timestamp":1601385747000},"page":"1-4","source":"Crossref","is-referenced-by-count":2,"title":["Adaptive Pulse Program Scheme to Improve the Vth Distribution for 3D NAND Flash"],"prefix":"10.1109","author":[{"given":"Shuang","family":"Li","sequence":"first","affiliation":[{"name":"Institute of Microelectronics of The Chinese Academy of Sciences, Beijing, China; University of Chinese Academy of Sciences, Beijing, China; Yangtze Memory Technologies Co., Ltd, Wuhan, China"}]},{"given":"Zhichao","family":"Du","sequence":"additional","affiliation":[{"name":"Institute of Microelectronics of The Chinese Academy of Sciences, Beijing, China; University of Chinese Academy of Sciences, Beijing, China"}]},{"given":"Yu","family":"Wang","sequence":"additional","affiliation":[{"name":"Yangtze Memory Technologies Co., Ltd, Wuhan, China"}]},{"given":"Fei","family":"Liu","sequence":"additional","affiliation":[{"name":"Institute of Microelectronics of The Chinese Academy of Sciences, Beijing, China"}]},{"given":"Qi","family":"Wang","sequence":"additional","affiliation":[{"name":"Institute of Microelectronics of The Chinese Academy of Sciences, Beijing, China; Yangtze Memory Technologies Co., Ltd, Wuhan, China"}]},{"given":"Zongliang","family":"Huo","sequence":"additional","affiliation":[{"name":"Institute of Microelectronics of The Chinese Academy of Sciences, Beijing, China; Yangtze Memory Technologies Co., Ltd, Wuhan, China"}]}],"member":"263","reference":[{"article-title":"Unleashing 3D NAND’s Potential with an Innovative Architecture","year":"0","author":"simon","key":"ref4"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1007\/978-90-481-9431-5_16"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ELINFOCOM.2016.7562960"},{"key":"ref2","doi-asserted-by":"crossref","first-page":"1149","DOI":"10.1109\/4.475701","article-title":"A 3.3 V 32 Mb NAND flash memory with incremental step pulse programming scheme","volume":"30","author":"suh","year":"1995","journal-title":"IEEE Journal of Solid-State Circuits"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.917559"}],"event":{"name":"2020 IEEE International Symposium on Circuits and Systems (ISCAS)","start":{"date-parts":[[2020,10,12]]},"location":"Seville, Spain","end":{"date-parts":[[2020,10,14]]}},"container-title":["2020 IEEE International Symposium on Circuits and Systems (ISCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9179985\/9180369\/09181006.pdf?arnumber=9181006","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,1,15]],"date-time":"2024-01-15T21:05:47Z","timestamp":1705352747000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9181006\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,10]]},"references-count":5,"URL":"https:\/\/doi.org\/10.1109\/iscas45731.2020.9181006","relation":{},"subject":[],"published":{"date-parts":[[2020,10]]}}}