{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,28]],"date-time":"2025-06-28T06:45:33Z","timestamp":1751093133637},"reference-count":21,"publisher":"IEEE","license":[{"start":{"date-parts":[[2022,5,28]],"date-time":"2022-05-28T00:00:00Z","timestamp":1653696000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2022,5,28]],"date-time":"2022-05-28T00:00:00Z","timestamp":1653696000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2022,5,28]]},"DOI":"10.1109\/iscas48785.2022.9937292","type":"proceedings-article","created":{"date-parts":[[2022,11,11]],"date-time":"2022-11-11T20:38:08Z","timestamp":1668199088000},"page":"3319-3323","source":"Crossref","is-referenced-by-count":5,"title":["Analog-memory-based 14nm Hardware Accelerator for Dense Deep Neural Networks including Transformers"],"prefix":"10.1109","author":[{"given":"Atsuya","family":"Okazaki","sequence":"first","affiliation":[{"name":"IBM Research - Tokyo,Japan"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Pritish","family":"Narayanan","sequence":"additional","affiliation":[{"name":"IBM Research - Almaden,San Jose,CA,USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Stefano","family":"Ambrogio","sequence":"additional","affiliation":[{"name":"IBM Research - Almaden,San Jose,CA,USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Kohji","family":"Hosokawa","sequence":"additional","affiliation":[{"name":"IBM Research - Tokyo,Japan"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Hsinyu","family":"Tsai","sequence":"additional","affiliation":[{"name":"IBM Research - Almaden,San Jose,CA,USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Akiyo","family":"Nomura","sequence":"additional","affiliation":[{"name":"IBM Research - Tokyo,Japan"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Takeo","family":"Yasuda","sequence":"additional","affiliation":[{"name":"IBM Research - Tokyo,Japan"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Charles","family":"Mackin","sequence":"additional","affiliation":[{"name":"IBM Research - Almaden,San Jose,CA,USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Alexander","family":"Friz","sequence":"additional","affiliation":[{"name":"IBM Research - Almaden,San Jose,CA,USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Masatoshi","family":"Ishii","sequence":"additional","affiliation":[{"name":"IBM Research - Tokyo,Japan"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yasuteru","family":"Kohda","sequence":"additional","affiliation":[{"name":"IBM Research - Tokyo,Japan"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Katie","family":"Spoon","sequence":"additional","affiliation":[{"name":"IBM Research - Almaden,San Jose,CA,USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"An","family":"Chen","sequence":"additional","affiliation":[{"name":"IBM Research - Almaden,San Jose,CA,USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Andrea","family":"Fasoli","sequence":"additional","affiliation":[{"name":"IBM Research - Almaden,San Jose,CA,USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Malte J.","family":"Rasch","sequence":"additional","affiliation":[{"name":"IBM Research - T. J. Watson Research Center,Yorktown Heights,NY,USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Geoffrey W.","family":"Burr","sequence":"additional","affiliation":[{"name":"IBM Research - Almaden,San Jose,CA,USA"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2021.3089987"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2019.8715178"},{"key":"ref12","article-title":"Fully on-chip MAC at 14nm enabled by accurate row-wise programming of PCM-based weights and parallel vector-transport in duration-format","author":"narayanan","year":"2021","journal-title":"2021 Symposium on VLSI Technology"},{"key":"ref13","article-title":"Fully on-chip MAC at 14nm enabled by accurate row-wise programming of PCM-based weights and parallel vector-transport in duration-format","author":"narayanan","year":"0","journal-title":"In IEEE Transactions on Electron Devices (2021) to appear"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.3389\/fncom.2021.675741"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1088\/1361-6463\/aac8a5"},{"key":"ref16","article-title":"Attention Is All You Need","author":"vaswani","year":"2017","journal-title":"arXiv 1706 03762 [cs CL]"},{"key":"ref17","article-title":"GLUE: A Multi-Task Benchmark and Analysis Platform for Natural Language Understanding","author":"wang","year":"2019","journal-title":"arXiv 1804 07461 [cs CL]"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.18653\/v1\/2020.emnlp-demos.6"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1145\/216585.216588"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1038\/s41467-018-04933-y"},{"article-title":"AI and Compute","year":"0","author":"amodei","key":"ref3"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1038\/s41928-019-0270-x"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/IRPS46558.2021.9405191"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM19573.2019.8993573"},{"key":"ref7","article-title":"BERT: Pre-training of Deep Bidirectional Transformers for Language Understanding","author":"devlin","year":"2019","journal-title":"arXiv 1810 04805 [cs CL]"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM19573.2019.8993482"},{"key":"ref1","first-page":"60","article-title":"Equivalent-accuracy accelerated neural-network training using analogue memory","author":"ambrogio","year":"2018","journal-title":"In Nature 558 7708"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1038\/s41467-020-16108-9"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.23919\/VLSIT.2019.8776485"},{"key":"ref21","doi-asserted-by":"crossref","first-page":"641","DOI":"10.1038\/s41586-020-1942-4","article-title":"Fully hardware-implemented memristor convolutional neural network","author":"yao","year":"2020","journal-title":"In Nature"}],"event":{"name":"2022 IEEE International Symposium on Circuits and Systems (ISCAS)","start":{"date-parts":[[2022,5,27]]},"location":"Austin, TX, USA","end":{"date-parts":[[2022,6,1]]}},"container-title":["2022 IEEE International Symposium on Circuits and Systems (ISCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9937201\/9937203\/09937292.pdf?arnumber=9937292","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,11,28]],"date-time":"2022-11-28T20:23:19Z","timestamp":1669666999000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9937292\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,5,28]]},"references-count":21,"URL":"https:\/\/doi.org\/10.1109\/iscas48785.2022.9937292","relation":{},"subject":[],"published":{"date-parts":[[2022,5,28]]}}}