{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,30]],"date-time":"2024-10-30T07:07:12Z","timestamp":1730272032248,"version":"3.28.0"},"reference-count":12,"publisher":"IEEE","license":[{"start":{"date-parts":[[2022,5,28]],"date-time":"2022-05-28T00:00:00Z","timestamp":1653696000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2022,5,28]],"date-time":"2022-05-28T00:00:00Z","timestamp":1653696000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2022,5,28]]},"DOI":"10.1109\/iscas48785.2022.9937569","type":"proceedings-article","created":{"date-parts":[[2022,11,11]],"date-time":"2022-11-11T20:38:08Z","timestamp":1668199088000},"page":"985-989","source":"Crossref","is-referenced-by-count":1,"title":["A 14-Gb\/s PAM4 Reference-Less Half-Baud-Rate CDR"],"prefix":"10.1109","author":[{"given":"M. Noormohammadi","family":"Khiarak","sequence":"first","affiliation":[{"name":"Rambus Canada Inc.,Toronto,ON,Canada"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"B.","family":"Gosselin","sequence":"additional","affiliation":[{"name":"Universit&#x00E9; Laval,Smart Biomedical Microsystems Lab.,Qu&#x00E9;bec,QC,Canada,G1V 0A6"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2018.2885540"},{"key":"ref3","doi-asserted-by":"crossref","first-page":"881","DOI":"10.1109\/JSSC.2016.2520395","article-title":"A 3.8 mW\/Gbps quad-channel 8.5&#x2013;13 Gbps serial link with a 5 tap DFE and a 4 tap transmit FFE in 28 nm CMOS","volume":"51","author":"kocaman","year":"2016","journal-title":"IEEE J Solid-State Circuits"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2019.2907804"},{"article-title":"Design of Integrated Circuits for Optical Communications","year":"2002","author":"razavi","key":"ref6"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/LSSC.2019.2936768"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2020.2978138"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2017.2740268"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2031042"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/4.173101"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1049\/el:19750415"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2168872"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2003.1234216"}],"event":{"name":"2022 IEEE International Symposium on Circuits and Systems (ISCAS)","start":{"date-parts":[[2022,5,27]]},"location":"Austin, TX, USA","end":{"date-parts":[[2022,6,1]]}},"container-title":["2022 IEEE International Symposium on Circuits and Systems (ISCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9937201\/9937203\/09937569.pdf?arnumber=9937569","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,11,28]],"date-time":"2022-11-28T20:20:42Z","timestamp":1669666842000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9937569\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,5,28]]},"references-count":12,"URL":"https:\/\/doi.org\/10.1109\/iscas48785.2022.9937569","relation":{},"subject":[],"published":{"date-parts":[[2022,5,28]]}}}