{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,1]],"date-time":"2025-12-01T11:25:47Z","timestamp":1764588347448,"version":"3.37.3"},"reference-count":19,"publisher":"IEEE","license":[{"start":{"date-parts":[[2022,5,28]],"date-time":"2022-05-28T00:00:00Z","timestamp":1653696000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2022,5,28]],"date-time":"2022-05-28T00:00:00Z","timestamp":1653696000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100003395","name":"Shanghai Municipal Education Commission","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100003395","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100003347","name":"Fudan University","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100003347","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100003347","name":"Fudan University","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100003347","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2022,5,28]]},"DOI":"10.1109\/iscas48785.2022.9937709","type":"proceedings-article","created":{"date-parts":[[2022,11,11]],"date-time":"2022-11-11T20:38:08Z","timestamp":1668199088000},"page":"2012-2016","source":"Crossref","is-referenced-by-count":9,"title":["An Area-efficient Unified Transform Architecture for VVC"],"prefix":"10.1109","author":[{"given":"Zhijian","family":"Hao","sequence":"first","affiliation":[{"name":"Fudan University,State Key Lab of ASIC & System,Shanghai,China,200433"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Qi","family":"Zheng","sequence":"additional","affiliation":[{"name":"Fudan University,State Key Lab of ASIC & System,Shanghai,China,200433"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yibo","family":"Fan","sequence":"additional","affiliation":[{"name":"Fudan University,State Key Lab of ASIC & System,Shanghai,China,200433"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Guoqing","family":"Xiang","sequence":"additional","affiliation":[{"name":"Advanced Institute of Information Technology Peking University,Hangzhou,Zhejiang,China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Peng","family":"Zhang","sequence":"additional","affiliation":[{"name":"Advanced Institute of Information Technology Peking University,Hangzhou,Zhejiang,China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Heming","family":"Sun","sequence":"additional","affiliation":[{"name":"Waseda Research Institute for Science and Engineering Waseda University,Japan"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TCE.2018.2812459"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TCE.2019.2913327"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2020.2991299"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TCE.2018.2875528"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TCSVT.2019.2934752"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS51556.2021.9401178"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2018.2815532"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TCSVT.2018.2886736"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TCE.2017.014862"},{"key":"ref19","article-title":"A minimal adder-oriented 1d dst-vii\/dct-viii hardware implementation for vvc standard","author":"fan","year":"2019","journal-title":"2019 32nd IEEE International System-on-Chip Conference (SOCC)"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ICME.2012.7"},{"key":"ref3","article-title":"Ahg report: Test model software development (ahg3)","author":"bossen","year":"2019","journal-title":"JVET-M0003"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/3109984.3109987"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/VCIP.2014.7051538"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TCSVT.2013.2276862"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1155\/2012\/752024"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TCSVT.2012.2221191"},{"key":"ref1","first-page":"9","article-title":"Working draft 4 of versatile video coding","author":"bross","year":"2019","journal-title":"Joint Video Experts Team (JVET) of ITU-T SG6 WP3 and ISO\/IEC JTC1\/SC29\/WG11 13th Meeting Marrakech MA"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TCE.2017.014862"}],"event":{"name":"2022 IEEE International Symposium on Circuits and Systems (ISCAS)","start":{"date-parts":[[2022,5,27]]},"location":"Austin, TX, USA","end":{"date-parts":[[2022,6,1]]}},"container-title":["2022 IEEE International Symposium on Circuits and Systems (ISCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9937201\/9937203\/09937709.pdf?arnumber=9937709","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,11,28]],"date-time":"2022-11-28T20:20:13Z","timestamp":1669666813000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9937709\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,5,28]]},"references-count":19,"URL":"https:\/\/doi.org\/10.1109\/iscas48785.2022.9937709","relation":{},"subject":[],"published":{"date-parts":[[2022,5,28]]}}}