{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,10,14]],"date-time":"2026-10-14T16:43:13Z","timestamp":1791996193580,"version":"4.4.0"},"reference-count":19,"publisher":"IEEE","license":[{"start":{"date-parts":[[2021,5,1]],"date-time":"2021-05-01T00:00:00Z","timestamp":1619827200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2021,5,1]],"date-time":"2021-05-01T00:00:00Z","timestamp":1619827200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2021,5,1]],"date-time":"2021-05-01T00:00:00Z","timestamp":1619827200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2021,5]]},"DOI":"10.1109\/iscas51556.2021.9401119","type":"proceedings-article","created":{"date-parts":[[2021,4,27]],"date-time":"2021-04-27T17:33:36Z","timestamp":1619544816000},"page":"1-5","source":"Crossref","is-referenced-by-count":44,"title":["Fingerprinting Deep Neural Networks - a DeepFool Approach"],"prefix":"10.1109","author":[{"given":"Si","family":"Wang","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Chip-Hong","family":"Chang","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref10","article-title":"IPGuard: Protecting intellectual property of deep neural networks via fingerprinting the classification boundary","author":"cao","year":"2020"},{"key":"ref11","article-title":"Deep neural network fingerprinting by conferrable adversarial examples","author":"lukas","year":"2020"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR.2016.282"},{"key":"ref13","article-title":"Bayes’ theorem","author":"joyce","year":"2003"},{"key":"ref14","article-title":"Security analysis of deep neural networks operating in the presence of cache side-channel attacks","author":"hong","year":"2018","journal-title":"CoRR"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1145\/3243734.3243831"},{"key":"ref16","first-page":"515","article-title":"CSI NN: Reverse engineering of neural network architectures through electromagnetic side channel","author":"batina","year":"0"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1145\/3316781.3322465"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR.2016.90"},{"key":"ref19","article-title":"Proper ResNet implementation for CIFAR10\/CIFAR100 in PyTorch","author":"idelbayev","year":"0"},{"key":"ref4","article-title":"Neural network model extraction attacks in edge devices by hearing architectural hints","author":"hu","year":"2019","journal-title":"CoRR"},{"key":"ref3","article-title":"Cache telepathy: Leveraging shared resource attacks to learn dnn architectures","author":"yan","year":"2020","journal-title":"USENIX Security Symposium"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/3078971.3078974"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-030-28954-6_7"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/3196494.3196550"},{"key":"ref7","first-page":"1615","article-title":"Turning your weakness into a strength: Watermarking deep neural networks by back-dooring","author":"adi","year":"0"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/SP.2018.00038"},{"key":"ref1","first-page":"601","article-title":"Stealing machine learning models via prediction apis","author":"tram\u00e8r","year":"2016","journal-title":"25th USENIX Security Symposium"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/3297858.3304051"}],"event":{"name":"2021 IEEE International Symposium on Circuits and Systems (ISCAS)","location":"Daegu, Korea","start":{"date-parts":[[2021,5,22]]},"end":{"date-parts":[[2021,5,28]]}},"container-title":["2021 IEEE International Symposium on Circuits and Systems (ISCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9401028\/9401051\/09401119.pdf?arnumber=9401119","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,5,10]],"date-time":"2022-05-10T11:44:15Z","timestamp":1652183055000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9401119\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,5]]},"references-count":19,"URL":"https:\/\/doi.org\/10.1109\/iscas51556.2021.9401119","relation":{},"subject":[],"published":{"date-parts":[[2021,5]]}}}