{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,21]],"date-time":"2025-12-21T06:24:24Z","timestamp":1766298264112},"reference-count":9,"publisher":"IEEE","license":[{"start":{"date-parts":[[2021,5,1]],"date-time":"2021-05-01T00:00:00Z","timestamp":1619827200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2021,5,1]],"date-time":"2021-05-01T00:00:00Z","timestamp":1619827200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2021,5,1]],"date-time":"2021-05-01T00:00:00Z","timestamp":1619827200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2021,5]]},"DOI":"10.1109\/iscas51556.2021.9401420","type":"proceedings-article","created":{"date-parts":[[2021,4,27]],"date-time":"2021-04-27T17:33:36Z","timestamp":1619544816000},"page":"1-4","source":"Crossref","is-referenced-by-count":3,"title":["Self-Timed Write Aid Circuit for Tall Memories in Advanced CMOS Technologies"],"prefix":"10.1109","author":[{"given":"Vivek","family":"Nautiyal","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Gaurav","family":"Singla","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Bikas","family":"Maiti","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Martin","family":"Kinkade","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","article-title":"Interconnect performance and scaling strategy at 7 nm node","author":"chen","year":"0","journal-title":"Interconnect Technology Conference\/Advanced Metallization Conference"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2014.6946037"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2013.6487750"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2014.6858412"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ISLPED.2017.8009154"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2012.6176988"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.1995.499187"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2010.5457179"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2018.8351117"}],"event":{"name":"2021 IEEE International Symposium on Circuits and Systems (ISCAS)","start":{"date-parts":[[2021,5,22]]},"location":"Daegu, Korea","end":{"date-parts":[[2021,5,28]]}},"container-title":["2021 IEEE International Symposium on Circuits and Systems (ISCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9401028\/9401051\/09401420.pdf?arnumber=9401420","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,7,8]],"date-time":"2022-07-08T22:20:56Z","timestamp":1657318856000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9401420\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,5]]},"references-count":9,"URL":"https:\/\/doi.org\/10.1109\/iscas51556.2021.9401420","relation":{},"subject":[],"published":{"date-parts":[[2021,5]]}}}