{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,2,21]],"date-time":"2025-02-21T01:06:18Z","timestamp":1740099978500,"version":"3.37.3"},"reference-count":15,"publisher":"IEEE","license":[{"start":{"date-parts":[[2021,5,1]],"date-time":"2021-05-01T00:00:00Z","timestamp":1619827200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2021,5,1]],"date-time":"2021-05-01T00:00:00Z","timestamp":1619827200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2021,5,1]],"date-time":"2021-05-01T00:00:00Z","timestamp":1619827200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100002367","name":"Chinese Academy of Sciences","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100002367","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2021,5]]},"DOI":"10.1109\/iscas51556.2021.9401670","type":"proceedings-article","created":{"date-parts":[[2021,4,27]],"date-time":"2021-04-27T21:33:36Z","timestamp":1619559216000},"page":"1-4","source":"Crossref","is-referenced-by-count":2,"title":["Sparsity-Aware Clamping Readout Scheme for High Parallelism and Low Power Nonvolatile Computing-in-Memory Based on Resistive Memory"],"prefix":"10.1109","author":[{"given":"Linfang","family":"Wang","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Wang","family":"Ye","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Junjie","family":"An","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Chunmeng","family":"Dou","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Qi","family":"Liu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Meng-Fan","family":"Chang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ming","family":"Liu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18072.2020.9218630"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18072.2020.9218645"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2016.7783723"},{"key":"ref13","first-page":"260t","article-title":"A 462GOPs\/J RRAM-based nonvolatile intelligent processor for energy harvesting IoE system featuring nonvolatile logics and processing-in-memory","author":"su","year":"2017","journal-title":"IEEE Symposium on VLSI Technology"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIT.2018.8510627"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2004.829399"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1038\/s41928-017-0006-8"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1038\/s41928-018-0092-2"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2019.8662395"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1038\/s41928-019-0288-0"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC19947.2020.9062953"},{"key":"ref7","first-page":"498","article-title":"A 74 TMACS\/W CMOS-RRAM Neurosynaptic Core with Dynamically Reconfigurable Dataflow and In-situ Transposable Weights for Probabilistic Graphical Models","author":"wan","year":"2020","journal-title":"IEEE Int Solid-State Circuit Conf (ISSCC)"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/MSSC.2017.2745798"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/MSSC.2019.2922889"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/3007787.3001139"}],"event":{"name":"2021 IEEE International Symposium on Circuits and Systems (ISCAS)","start":{"date-parts":[[2021,5,22]]},"location":"Daegu, Korea","end":{"date-parts":[[2021,5,28]]}},"container-title":["2021 IEEE International Symposium on Circuits and Systems (ISCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9401028\/9401051\/09401670.pdf?arnumber=9401670","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,5,10]],"date-time":"2022-05-10T15:44:16Z","timestamp":1652197456000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9401670\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,5]]},"references-count":15,"URL":"https:\/\/doi.org\/10.1109\/iscas51556.2021.9401670","relation":{},"subject":[],"published":{"date-parts":[[2021,5]]}}}