{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,30]],"date-time":"2026-06-30T15:43:24Z","timestamp":1782834204261,"version":"3.54.5"},"reference-count":27,"publisher":"IEEE","license":[{"start":{"date-parts":[[2021,5,1]],"date-time":"2021-05-01T00:00:00Z","timestamp":1619827200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2021,5,1]],"date-time":"2021-05-01T00:00:00Z","timestamp":1619827200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2021,5,1]],"date-time":"2021-05-01T00:00:00Z","timestamp":1619827200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2021,5]]},"DOI":"10.1109\/iscas51556.2021.9401774","type":"proceedings-article","created":{"date-parts":[[2021,4,27]],"date-time":"2021-04-27T21:33:36Z","timestamp":1619559216000},"page":"1-5","source":"Crossref","is-referenced-by-count":4,"title":["Is It Time to Include High-Level Synthesis Design in Digital System Education for Undergraduate Computer Engineers?"],"prefix":"10.1109","author":[{"given":"Isaac","family":"Nelson","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Ricardo","family":"Ferreira","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Jose Augusto","family":"Nacif","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Peter","family":"Jamieson","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/CSCI49370.2019.00148"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.18260\/1-2--29102"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/2832932.2832936"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/3375258.3375272"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2018.2834439"},{"key":"ref15","article-title":"Silicon compilers","author":"gajski","year":"1987"},{"key":"ref16","author":"micheli","year":"1994","journal-title":"Synthesis and Optimization of Digital Circuits"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1145\/1950413.1950423"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2013.6645550"},{"key":"ref19","first-page":"30","article-title":"Vivado design suite","volume":"5","author":"feist","year":"2012","journal-title":"White Paper"},{"key":"ref4","article-title":"Curriculum guidelines for undergraduate degree programs in computer engineering","author":"impagliazzo","year":"2016"},{"key":"ref27","first-page":"1","article-title":"Introducing fpga-based machine learning on the edge to undergraduate students","author":"panicker","year":"2020","journal-title":"2020 IEEE Frontiers in Education Conference (FIE)"},{"key":"ref3","article-title":"The risc-v instruction set manual, volume i: Base user-level isa","volume":"116","author":"waterman","year":"2011","journal-title":"Tech Rep UCB\/EECS-2011-62"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/FIE.1995.483203"},{"key":"ref5","first-page":"175","article-title":"A brief history of american k-12 mathematics education in the 20th century","author":"klein","year":"2003","journal-title":"Mathematical Cognition"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TALE.2013.6654423"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/FIE.2001.963843"},{"key":"ref2","year":"1987","journal-title":"IEEE Standard VHDL Language Reference Manual"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/13.925805"},{"key":"ref1","year":"1993","journal-title":"Verilog hardware description reference"},{"key":"ref20","article-title":"Intel HLS compiler: Fast design coding and hardware","author":"sussmann","year":"2017","journal-title":"White Paper"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1007\/s11390-020-9414-8"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2015.2513673"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2014.6927498"},{"key":"ref23","article-title":"Study of the techniques for emulation programming","author":"moya","year":"2001","journal-title":"Proyecto fin de carrera Universidad Politécnica de Cataluña España"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/FIE.2015.7344259"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/CSCI49370.2019.00149"}],"event":{"name":"2021 IEEE International Symposium on Circuits and Systems (ISCAS)","location":"Daegu, Korea","start":{"date-parts":[[2021,5,22]]},"end":{"date-parts":[[2021,5,28]]}},"container-title":["2021 IEEE International Symposium on Circuits and Systems (ISCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9401028\/9401051\/09401774.pdf?arnumber=9401774","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,5,10]],"date-time":"2022-05-10T15:44:09Z","timestamp":1652197449000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9401774\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,5]]},"references-count":27,"URL":"https:\/\/doi.org\/10.1109\/iscas51556.2021.9401774","relation":{},"subject":[],"published":{"date-parts":[[2021,5]]}}}