{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,29]],"date-time":"2025-06-29T04:04:24Z","timestamp":1751169864603,"version":"3.41.0"},"reference-count":11,"publisher":"IEEE","license":[{"start":{"date-parts":[[2025,5,25]],"date-time":"2025-05-25T00:00:00Z","timestamp":1748131200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,5,25]],"date-time":"2025-05-25T00:00:00Z","timestamp":1748131200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100018461","name":"Silicon Austria Labs","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100018461","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2025,5,25]]},"DOI":"10.1109\/iscas56072.2025.11043448","type":"proceedings-article","created":{"date-parts":[[2025,6,27]],"date-time":"2025-06-27T17:42:19Z","timestamp":1751046139000},"page":"1-5","source":"Crossref","is-referenced-by-count":0,"title":["Enhanced Time Amplifier with Trimming Voltage for Error Reduction in Time-to-Digital Converters"],"prefix":"10.1109","author":[{"given":"Javad","family":"Ahmadi-Farsani","sequence":"first","affiliation":[{"name":"FEIC-IWS - Europastraße 12,Silicon Austria Labs (SAL),Villach,Austria,A-9524"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ion","family":"Vornicu","sequence":"additional","affiliation":[{"name":"FEIC-IWS - Europastraße 12,Silicon Austria Labs (SAL),Villach,Austria,A-9524"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Laurentiu","family":"Acasandrei","sequence":"additional","affiliation":[{"name":"FEIC-IWS - Europastraße 12,Silicon Austria Labs (SAL),Villach,Austria,A-9524"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TIM.2023.3240218"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2020.3048650"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2018.2868242"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TIE.2017.2669883"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ASICON.2015.7517035"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/NEWCAS.2015.7182045"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2014.2328800"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2014.2343244"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2020.2977861"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2018.2853187"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1049\/el.2017.1771"}],"event":{"name":"2025 IEEE International Symposium on Circuits and Systems (ISCAS)","start":{"date-parts":[[2025,5,25]]},"location":"London, United Kingdom","end":{"date-parts":[[2025,5,28]]}},"container-title":["2025 IEEE International Symposium on Circuits and Systems (ISCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/11043142\/11042930\/11043448.pdf?arnumber=11043448","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,28]],"date-time":"2025-06-28T06:53:39Z","timestamp":1751093619000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11043448\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,5,25]]},"references-count":11,"URL":"https:\/\/doi.org\/10.1109\/iscas56072.2025.11043448","relation":{},"subject":[],"published":{"date-parts":[[2025,5,25]]}}}