{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,29]],"date-time":"2025-06-29T04:04:21Z","timestamp":1751169861572,"version":"3.41.0"},"reference-count":30,"publisher":"IEEE","license":[{"start":{"date-parts":[[2025,5,25]],"date-time":"2025-05-25T00:00:00Z","timestamp":1748131200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,5,25]],"date-time":"2025-05-25T00:00:00Z","timestamp":1748131200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2025,5,25]]},"DOI":"10.1109\/iscas56072.2025.11044103","type":"proceedings-article","created":{"date-parts":[[2025,6,27]],"date-time":"2025-06-27T17:42:19Z","timestamp":1751046139000},"page":"1-5","source":"Crossref","is-referenced-by-count":0,"title":["RRR: Robust runtime reconfigurable shared cache management scheme for GPGPUs"],"prefix":"10.1109","author":[{"given":"Varun","family":"Venkitaraman","sequence":"first","affiliation":[{"name":"Indian Institute of Technology,Department of Electrical Engineering,Bombay,India"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Shrasti","family":"Bhargava","sequence":"additional","affiliation":[{"name":"Indian Institute of Technology,Department of Electrical Engineering,Bombay,India"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Tejeshwar B.","family":"Thorawade","sequence":"additional","affiliation":[{"name":"Indian Institute of Technology,Department of Electrical Engineering,Bombay,India"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"K.","family":"Kokkiligadda","sequence":"additional","affiliation":[{"name":"Indian Institute of Technology,Department of Electrical Engineering,Bombay,India"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Rahul","family":"Kumar","sequence":"additional","affiliation":[{"name":"Indian Institute of Technology,Department of Electrical Engineering,Bombay,India"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Virendra","family":"Singh","sequence":"additional","affiliation":[{"name":"Indian Institute of Technology,Department of Electrical Engineering,Bombay,India"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2008.917757"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/2647868.2654889"},{"key":"ref3","article-title":"NVIDIA\u2019s Next Generation CUDA Compute Architecture:Fermi"},{"key":"ref4","article-title":"NVIDIA Tesla V100 GPU Architecture The World\u2019s Most Advanced Data Center GPU. White paper"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/2591635.2667186"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2006.17"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2005.39"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2005.53"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2006.10"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2010.83"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555779"},{"key":"ref12","first-page":"489","article-title":"A data layout optimization framework for nuca-based multicores","volume-title":"Proceedings of the 44th Annual IEEE\/ACM International Symposium on Microarchitecture","author":"Zhang"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/SC.2008.5216918"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2007.346180"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1145\/1086297.1086328"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1145\/1399972.1399973"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1145\/1378533.1378535"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1145\/1399972.1399982"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/PACT.2013.6618818"},{"key":"ref20","first-page":"411","article-title":"Adaptive memory-side last-level gpu caching","volume-title":"Proceedings of the 46th International Symposium on Computer Architecture","author":"Zhao"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA53966.2022.00056"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2002.995703"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/PACT.2004.1342546"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1016\/j.sysarc.2018.07.003"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2009.4919648"},{"key":"ref26","article-title":"Cuda c\/c++ basics","author":"Zeller","year":"2011","journal-title":"NVIDIA Coporation"},{"key":"ref27","article-title":"Nvidia cuda c programming guide, version 4.2","volume":"66","author":"Nvidia","year":"2010","journal-title":"NVIDIA: Santa Clara, CA"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/IISWC.2009.5306797"},{"issue":"7.2","key":"ref29","article-title":"Parboil: A revised benchmark suite for scientific and commercial throughput computing","volume":"127","author":"Stratton","year":"2012","journal-title":"Center for Reliable and High-Performance Computing"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1145\/1735688.1735702"}],"event":{"name":"2025 IEEE International Symposium on Circuits and Systems (ISCAS)","start":{"date-parts":[[2025,5,25]]},"location":"London, United Kingdom","end":{"date-parts":[[2025,5,28]]}},"container-title":["2025 IEEE International Symposium on Circuits and Systems (ISCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/11043142\/11042930\/11044103.pdf?arnumber=11044103","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,28]],"date-time":"2025-06-28T06:48:04Z","timestamp":1751093284000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11044103\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,5,25]]},"references-count":30,"URL":"https:\/\/doi.org\/10.1109\/iscas56072.2025.11044103","relation":{},"subject":[],"published":{"date-parts":[[2025,5,25]]}}}