{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,30]],"date-time":"2026-06-30T15:44:29Z","timestamp":1782834269625,"version":"3.54.5"},"reference-count":20,"publisher":"IEEE","license":[{"start":{"date-parts":[[2024,5,19]],"date-time":"2024-05-19T00:00:00Z","timestamp":1716076800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2024,5,19]],"date-time":"2024-05-19T00:00:00Z","timestamp":1716076800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2024,5,19]]},"DOI":"10.1109\/iscas58744.2024.10558351","type":"proceedings-article","created":{"date-parts":[[2024,7,2]],"date-time":"2024-07-02T17:22:52Z","timestamp":1719940972000},"page":"1-5","source":"Crossref","is-referenced-by-count":7,"title":["SPAT: FPGA-based Sparsity-Optimized Spiking Neural Network Training Accelerator with Temporal Parallel Dataflow"],"prefix":"10.1109","author":[{"given":"Yuanyuan","family":"Jiang","sequence":"first","affiliation":[{"name":"Peking University,School of Integrated Circuits,Beijing,China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Li","family":"Lun","sequence":"additional","affiliation":[{"name":"Peking University,School of Integrated Circuits,Beijing,China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Jiawei","family":"Wang","sequence":"additional","affiliation":[{"name":"Peking University,School of Integrated Circuits,Beijing,China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Mingqi","family":"Yin","sequence":"additional","affiliation":[{"name":"Peking University,School of Integrated Circuits,Beijing,China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Hanqing","family":"Liu","sequence":"additional","affiliation":[{"name":"Peking University,School of Integrated Circuits,Beijing,China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Zhenhui","family":"Dai","sequence":"additional","affiliation":[{"name":"Peking University,School of Integrated Circuits,Beijing,China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Xiaole","family":"Cui","sequence":"additional","affiliation":[{"name":"Peking University,School of Integrated Circuits,Beijing,China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Xiaoxin","family":"Cui","sequence":"additional","affiliation":[{"name":"Peking University,School of Integrated Circuits,Beijing,China"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1038\/s41928-020-0435-7"},{"issue":"7784","key":"ref2","first-page":"607","article-title":"Towards spike-based machine intelligence with neuromorphic computing","volume-title":"Nature","volume":"575","author":"Roy","year":"2019"},{"issue":"5","key":"ref3","first-page":"051001","article-title":"Large-scale neuromorphic computing systems","volume-title":"J Neural Eng","volume":"13","author":"Furber","year":"2016"},{"key":"ref4","volume-title":"The organization of behavior: a neuropsychological theory.","author":"Hebb","year":"1949"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1146\/annurev.neuro.31.060407.125639"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.3389\/fnins.2018.00331"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2021.3138347"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1609\/aaai.v33i01.33011311"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.3389\/fnins.2016.00508"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2018.2790840"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA45697.2020.00038"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/3489517.3530592"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42615.2023.10067650"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/3510854"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/tcad.2022.3213211"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1126\/science.1254642"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS46773.2023.10181432"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2022.3158834"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM.2019.00016"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1038\/s41598-023-32120-7"}],"event":{"name":"2024 IEEE International Symposium on Circuits and Systems (ISCAS)","location":"Singapore, Singapore","start":{"date-parts":[[2024,5,19]]},"end":{"date-parts":[[2024,5,22]]}},"container-title":["2024 IEEE International Symposium on Circuits and Systems (ISCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/10557746\/10557828\/10558351.pdf?arnumber=10558351","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,7,3]],"date-time":"2024-07-03T08:03:41Z","timestamp":1719993821000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10558351\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,5,19]]},"references-count":20,"URL":"https:\/\/doi.org\/10.1109\/iscas58744.2024.10558351","relation":{},"subject":[],"published":{"date-parts":[[2024,5,19]]}}}