{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,19]],"date-time":"2026-06-19T06:51:27Z","timestamp":1781851887958,"version":"3.54.5"},"reference-count":24,"publisher":"IEEE","license":[{"start":{"date-parts":[[2026,5,24]],"date-time":"2026-05-24T00:00:00Z","timestamp":1779580800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2026,5,24]],"date-time":"2026-05-24T00:00:00Z","timestamp":1779580800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2026,5,24]]},"DOI":"10.1109\/iscas66217.2026.11562619","type":"proceedings-article","created":{"date-parts":[[2026,6,18]],"date-time":"2026-06-18T20:06:41Z","timestamp":1781813201000},"page":"4063-4067","source":"Crossref","is-referenced-by-count":0,"title":["Algorithm-Aided Design and Verification for Multiple-Node-Upset-Recovery Latches"],"prefix":"10.1109","author":[{"given":"Zhiyuan","family":"Pei","sequence":"first","affiliation":[{"name":"Anhui University,School of Computer Science and Technology,Hefei,China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Jing","family":"Li","sequence":"additional","affiliation":[{"name":"Hefei University of Technology,School of Microelectronics,Hefei,China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Haroon","family":"Waris","sequence":"additional","affiliation":[{"name":"Institute of Space Technology,Department of Electrical Engineering,Islamabad,Pakistan"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"M. Shahzad","family":"Younis","sequence":"additional","affiliation":[{"name":"National University of Sciences and Technology,School of EECS,Islamabad,Pakistan"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Aibin","family":"Yan","sequence":"additional","affiliation":[{"name":"Hefei University of Technology,School of Microelectronics,Hefei,China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Jiahui","family":"Deng","sequence":"additional","affiliation":[{"name":"Hefei University of Technology,School of Microelectronics,Hefei,China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Yilin","family":"Gui","sequence":"additional","affiliation":[{"name":"Hefei University of Technology,School of Microelectronics,Hefei,China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Xiaoqing","family":"Wen","sequence":"additional","affiliation":[{"name":"Kyushu Institute of Technology,Graduate School of Computer Science and Systems Engineering,Fukuoka,Japan"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JEDS.2019.2907299"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.2013.2286523"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TAES.2023.3316998"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2024.3511335"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2024.3467089"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TAES.2024.3379962"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1049\/iet-cdt.2008.0099"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1587\/transele.E98.C.1171"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ICSICT.2018.8565650"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1049\/el.2014.4374"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2020.2973676"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1007\/s10836-015-5551-3"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/MWSCAS.2015.7282145"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.2019.2939380"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TAES.2019.2925448"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2020.2966200"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1016\/j.microrel.2022.114857"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.3390\/electronics11213606"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1145\/3649476.3658761"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/TDMR.2024.3386954"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1016\/j.microrel.2012.01.001"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18072.2020.9218704"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/TAES.2022.3216795"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/23.556880"}],"event":{"name":"2026 IEEE International Symposium on Circuits and Systems (ISCAS)","location":"Shanghai, China","start":{"date-parts":[[2026,5,24]]},"end":{"date-parts":[[2026,5,28]]}},"container-title":["2026 IEEE International Symposium on Circuits and Systems (ISCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/11561899\/11561804\/11562619.pdf?arnumber=11562619","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,6,19]],"date-time":"2026-06-19T05:57:55Z","timestamp":1781848675000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11562619\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2026,5,24]]},"references-count":24,"URL":"https:\/\/doi.org\/10.1109\/iscas66217.2026.11562619","relation":{},"subject":[],"published":{"date-parts":[[2026,5,24]]}}}