{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,19]],"date-time":"2026-06-19T05:55:11Z","timestamp":1781848511728,"version":"3.54.5"},"reference-count":18,"publisher":"IEEE","license":[{"start":{"date-parts":[[2026,5,24]],"date-time":"2026-05-24T00:00:00Z","timestamp":1779580800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2026,5,24]],"date-time":"2026-05-24T00:00:00Z","timestamp":1779580800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2026,5,24]]},"DOI":"10.1109\/iscas66217.2026.11562891","type":"proceedings-article","created":{"date-parts":[[2026,6,18]],"date-time":"2026-06-18T20:06:41Z","timestamp":1781813201000},"page":"1256-1260","source":"Crossref","is-referenced-by-count":0,"title":["RACP: An Efficient RISC-V Domain-Specific Processor for Arbitrary-Size Kernel CNNs"],"prefix":"10.1109","author":[{"given":"Bowen","family":"Jiang","sequence":"first","affiliation":[{"name":"Jiangnan University,School of Artificial Intelligence and Computer Science,Wuxi,China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Jianyang","family":"Ding","sequence":"additional","affiliation":[{"name":"Jiangnan University,School of Artificial Intelligence and Computer Science,Wuxi,China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Tianshuo","family":"Lu","sequence":"additional","affiliation":[{"name":"Jiangnan University,School of Artificial Intelligence and Computer Science,Wuxi,China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Huachen","family":"Zhang","sequence":"additional","affiliation":[{"name":"Jiangnan University,School of Artificial Intelligence and Computer Science,Wuxi,China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Xuzhuo","family":"Hu","sequence":"additional","affiliation":[{"name":"Jiangnan University,School of Artificial Intelligence and Computer Science,Wuxi,China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Zhilei","family":"Chai","sequence":"additional","affiliation":[{"name":"Jiangnan University,School of Artificial Intelligence and Computer Science,Wuxi,China"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-46493-0_22"},{"key":"ref2","article-title":"Pyramidal convolution: Rethinking convolutional neural networks for visual recognition","author":"Duta","year":"2020"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1162\/jocn_a_01544"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/3505244"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR52733.2024.00531"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2021.3108762"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/3652855"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2021.3131581"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/3466752.3480043"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2019.2928682"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1016\/j.eng.2020.01.007"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2022.3226481"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2025.3554332"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM62733.2025.00058"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM62733.2025.00057"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2024.3362060"},{"key":"ref17","article-title":"An in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform","year":"2019"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2024.3383871"}],"event":{"name":"2026 IEEE International Symposium on Circuits and Systems (ISCAS)","location":"Shanghai, China","start":{"date-parts":[[2026,5,24]]},"end":{"date-parts":[[2026,5,28]]}},"container-title":["2026 IEEE International Symposium on Circuits and Systems (ISCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/11561899\/11561804\/11562891.pdf?arnumber=11562891","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,6,19]],"date-time":"2026-06-19T05:50:17Z","timestamp":1781848217000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11562891\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2026,5,24]]},"references-count":18,"URL":"https:\/\/doi.org\/10.1109\/iscas66217.2026.11562891","relation":{},"subject":[],"published":{"date-parts":[[2026,5,24]]}}}