{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,19]],"date-time":"2026-06-19T05:54:56Z","timestamp":1781848496800,"version":"3.54.5"},"reference-count":12,"publisher":"IEEE","license":[{"start":{"date-parts":[[2026,5,24]],"date-time":"2026-05-24T00:00:00Z","timestamp":1779580800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2026,5,24]],"date-time":"2026-05-24T00:00:00Z","timestamp":1779580800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2026,5,24]]},"DOI":"10.1109\/iscas66217.2026.11563011","type":"proceedings-article","created":{"date-parts":[[2026,6,18]],"date-time":"2026-06-18T20:06:41Z","timestamp":1781813201000},"page":"3763-3767","source":"Crossref","is-referenced-by-count":0,"title":["A 3-day ASIC Design Hands-on with the Minimal Fab"],"prefix":"10.1109","author":[{"given":"Hideharu","family":"Amano","sequence":"first","affiliation":[{"name":"The University of Tokyo,System Design Lab, Graduate School of Engineering,Tokyo,Japan"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Atsutake","family":"Kosuge","sequence":"additional","affiliation":[{"name":"The University of Tokyo,System Design Lab, Graduate School of Engineering,Tokyo,Japan"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Hirofumi","family":"Sumi","sequence":"additional","affiliation":[{"name":"The University of Tokyo,System Design Lab, Graduate School of Engineering,Tokyo,Japan"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Naonobu","family":"Shimamoto","sequence":"additional","affiliation":[{"name":"The University of Tokyo,System Design Lab, Graduate School of Engineering,Tokyo,Japan"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Yukinori","family":"Ochiai","sequence":"additional","affiliation":[{"name":"The University of Tokyo,System Design Lab, Graduate School of Engineering,Tokyo,Japan"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Yurie","family":"Inoue","sequence":"additional","affiliation":[{"name":"The University of Tokyo,System Design Lab, Graduate School of Engineering,Tokyo,Japan"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Tohru","family":"Mogami","sequence":"additional","affiliation":[{"name":"The University of Tokyo,System Design Lab, Graduate School of Engineering,Tokyo,Japan"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Yoshio","family":"Mita","sequence":"additional","affiliation":[{"name":"The University of Tokyo,System Design Lab, Graduate School of Engineering,Tokyo,Japan"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Makoto","family":"Ikeda","sequence":"additional","affiliation":[{"name":"The University of Tokyo,System Design Lab, Graduate School of Engineering,Tokyo,Japan"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref1","first-page":"82","article-title":"Mask cost for sub-100 nm technologies: Stopping a runaway?","volume-title":"Proc. SPIE","author":"Balasinski"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2013.2264690"},{"key":"ref3","article-title":"Build your own silicon with Googlel"},{"key":"ref4","article-title":"MPW fabrication"},{"key":"ref5","article-title":"About VDEC"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2024.3486239"},{"key":"ref7","article-title":"Micron-to-Submicron Cu electroplating in view of Agile-X LSI Chips Fabrication using Open Facility","volume-title":"The 3rd European Symposium on Nanofabrication Research Infrastructure (ENRIS 2023)","author":"Shimamoto"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TSM.2015.2429572"},{"key":"ref9","article-title":"DWL 66+: laser lithography tool"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS56072.2025.11043626"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/COOLCHIPS65488.2025.11018602"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.7567\/SSDM.2025.A-6-04"}],"event":{"name":"2026 IEEE International Symposium on Circuits and Systems (ISCAS)","location":"Shanghai, China","start":{"date-parts":[[2026,5,24]]},"end":{"date-parts":[[2026,5,28]]}},"container-title":["2026 IEEE International Symposium on Circuits and Systems (ISCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/11561899\/11561804\/11563011.pdf?arnumber=11563011","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,6,19]],"date-time":"2026-06-19T05:48:18Z","timestamp":1781848098000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11563011\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2026,5,24]]},"references-count":12,"URL":"https:\/\/doi.org\/10.1109\/iscas66217.2026.11563011","relation":{},"subject":[],"published":{"date-parts":[[2026,5,24]]}}}