{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,22]],"date-time":"2024-10-22T21:45:37Z","timestamp":1729633537673,"version":"3.28.0"},"reference-count":10,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2014,9]]},"DOI":"10.1109\/iscit.2014.7011912","type":"proceedings-article","created":{"date-parts":[[2015,1,21]],"date-time":"2015-01-21T14:36:49Z","timestamp":1421851009000},"page":"259-263","source":"Crossref","is-referenced-by-count":5,"title":["ASIC design of 7.7 Gbps multi-mode LDPC decoder for IEEE 802.11ac"],"prefix":"10.1109","author":[{"given":"Thi Hong","family":"Tran","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yuhei","family":"Nagao","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Hiroshi","family":"Ochi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Masayuki","family":"Kurosaki","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"doi-asserted-by":"publisher","key":"3","DOI":"10.1049\/el:19970362"},{"key":"2","doi-asserted-by":"crossref","DOI":"10.1186\/1687-1499-2014-93","article-title":"Algorithm and hardware design of a 20 sorter-based k-best mimo decoder","author":"tran","year":"2014","journal-title":"EURASIP J Wireless Commun and Networking"},{"doi-asserted-by":"publisher","key":"10","DOI":"10.1109\/TCSI.2010.2071910"},{"year":"2009","journal-title":"Part 11 Wireless LAN medium access control (MAC) and physical layer (PHY) specifications","key":"1"},{"doi-asserted-by":"publisher","key":"7","DOI":"10.1109\/ASSCC.2009.5357173"},{"doi-asserted-by":"publisher","key":"6","DOI":"10.1109\/TIT.1981.1056404"},{"doi-asserted-by":"publisher","key":"5","DOI":"10.1109\/TIT.1962.1057683"},{"key":"4","article-title":"Flexible lopc decoder architectures","volume":"2012","author":"awais","year":"2012","journal-title":"Hlndawi Publishing Corporation VLSI Design"},{"key":"9","doi-asserted-by":"crossref","first-page":"225","DOI":"10.1109\/ASAP.2010.5540958","article-title":"A fully-overlapp ed multimode qc-ldpc decoder architecture for mobile wimax applications","author":"xiang","year":"2010","journal-title":"The 21st IEEE Inter ConL on Application-Specific Sys Arch and Processors (ASAP-201O"},{"key":"8","first-page":"3929","article-title":"A flexible lopc decoder architecture supporting two decoding algorithms","author":"huang","year":"2010","journal-title":"The IEEE Inter Symp on Cir and Sys (lSCAS-201O"}],"event":{"name":"2014 14th International Symposium on Communications and Information Technologies (ISCIT)","start":{"date-parts":[[2014,9,24]]},"location":"Incheon, South Korea","end":{"date-parts":[[2014,9,26]]}},"container-title":["2014 14th International Symposium on Communications and Information Technologies (ISCIT)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7000610\/7011852\/07011912.pdf?arnumber=7011912","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,23]],"date-time":"2017-06-23T00:03:39Z","timestamp":1498176219000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7011912\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,9]]},"references-count":10,"URL":"https:\/\/doi.org\/10.1109\/iscit.2014.7011912","relation":{},"subject":[],"published":{"date-parts":[[2014,9]]}}}