{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,30]],"date-time":"2024-10-30T07:24:52Z","timestamp":1730273092864,"version":"3.28.0"},"reference-count":20,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2018,12]]},"DOI":"10.1109\/ised.2018.8703884","type":"proceedings-article","created":{"date-parts":[[2019,5,2]],"date-time":"2019-05-02T18:53:59Z","timestamp":1556823239000},"page":"129-134","source":"Crossref","is-referenced-by-count":3,"title":["Trace-Driven Simulation and Design Space Exploration of Network-on-Chip Topologies on FPGA"],"prefix":"10.1109","author":[{"given":"G S","family":"Sangeetha","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Vignesh","family":"Radhakrishnan","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Prabhu","family":"Prasad","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Khyamling","family":"Parane","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Basavaraj","family":"Talawar","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","first-page":"86","article-title":"A detailed and flexible cycle-accurate network-on-chip simulator, Performance Analysis of Systems and Software (ISPASS)","author":"jiang","year":"2013","journal-title":"2013 IEEE International Symposium on"},{"year":"0","journal-title":"Davide Patti Noxim","key":"ref11"},{"doi-asserted-by":"publisher","key":"ref12","DOI":"10.1109\/VLSID.2011.46"},{"doi-asserted-by":"publisher","key":"ref13","DOI":"10.1145\/1999946.1999970"},{"doi-asserted-by":"publisher","key":"ref14","DOI":"10.1145\/1999946.1999969"},{"key":"ref15","first-page":"1","article-title":"Ultra-fast noc emulation on a single fpga","author":"chu","year":"2015","journal-title":"FPL 2015"},{"doi-asserted-by":"publisher","key":"ref16","DOI":"10.1109\/FPL.2015.7293956"},{"doi-asserted-by":"publisher","key":"ref17","DOI":"10.1145\/2024716.2024718"},{"doi-asserted-by":"publisher","key":"ref18","DOI":"10.1145\/2370816.2370865"},{"doi-asserted-by":"publisher","key":"ref19","DOI":"10.1145\/1921249.1921258"},{"doi-asserted-by":"publisher","key":"ref4","DOI":"10.1109\/HPCA.2010.5416635"},{"doi-asserted-by":"publisher","key":"ref3","DOI":"10.2200\/S00586ED1V01Y201407CAC029"},{"doi-asserted-by":"publisher","key":"ref6","DOI":"10.1145\/2485922.2485963"},{"doi-asserted-by":"publisher","key":"ref5","DOI":"10.1145\/1577129.1577134"},{"doi-asserted-by":"publisher","key":"ref8","DOI":"10.1109\/ISPASS.2009.4919636"},{"key":"ref7","first-page":"1","volume":"xx","author":"kahng","year":"2010","journal-title":"ORION 2 0 A Power-Area Simulator for Interconnection Networks Tvlsi"},{"doi-asserted-by":"publisher","key":"ref2","DOI":"10.1109\/TC.2005.134"},{"key":"ref1","first-page":"0","article-title":"Route Packets","author":"dally","year":"0","journal-title":"Not Wires On-Chip Interconnection Networks"},{"key":"ref9","first-page":"15","author":"puente","year":"2002","journal-title":"Sicosys an integrated framework for studying interconnection network performance in multiprocessor systems Parallel Distributed and Network-based Processing 2002"},{"key":"ref20","article-title":"ProNoC: A low latency network-on-chip based many-core systemon-chip prototyping platform","author":"monemi","year":"2012","journal-title":"Microprocessors and Microsystems"}],"event":{"name":"2018 8th International Symposium on Embedded Computing and System Design (ISED)","start":{"date-parts":[[2018,12,13]]},"location":"Cochin, India","end":{"date-parts":[[2018,12,15]]}},"container-title":["2018 8th International Symposium on Embedded Computing and System Design (ISED)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8698774\/8703880\/08703884.pdf?arnumber=8703884","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,5,20]],"date-time":"2019-05-20T18:59:31Z","timestamp":1558378771000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8703884\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,12]]},"references-count":20,"URL":"https:\/\/doi.org\/10.1109\/ised.2018.8703884","relation":{},"subject":[],"published":{"date-parts":[[2018,12]]}}}