{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T18:05:02Z","timestamp":1725473102951},"reference-count":14,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2014,12]]},"DOI":"10.1109\/isicir.2014.7029467","type":"proceedings-article","created":{"date-parts":[[2015,2,10]],"date-time":"2015-02-10T09:52:27Z","timestamp":1423561947000},"page":"79-82","source":"Crossref","is-referenced-by-count":0,"title":["Digital phase locked loop (DPLL) with offset dithered bang-bang phase detector (BBPD) for bandwidth control"],"prefix":"10.1109","author":[{"given":"Younghoon","family":"Kim","sequence":"first","affiliation":[]},{"given":"Min-Ki","family":"Jeon","sequence":"additional","affiliation":[]},{"given":"Changsik","family":"Yoo","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"13","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2008.4585960"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2157259"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1109\/4.823449"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.917405"},{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2003.819128"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2004.826333"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2002.807398"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1109\/4.62166"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2012.6176995"},{"key":"6","first-page":"94","article-title":"Bang-bang digital PLLs at 11 and 20GHz with sub-200 fs integrated jitter for high-speed serial communication applications","author":"rylyakov","year":"2009","journal-title":"Dig Tech Papers IEEE Int Solid-State Circuits Conf"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2008.925948"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2004.836345"},{"key":"9","first-page":"478","article-title":"A 1.4psrms-periodjitter TDC-less fractional-N digital PLL with digitally controlled ring oscillator in 65nm CMOS","author":"grollitsch","year":"2010","journal-title":"Dig Tech Papers IEEE Int Solid-State Circuits Conf"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2008.2010109"}],"event":{"name":"2014 International Symposium on Integrated Circuits (ISIC)","start":{"date-parts":[[2014,12,10]]},"location":"Singapore","end":{"date-parts":[[2014,12,12]]}},"container-title":["2014 International Symposium on Integrated Circuits (ISIC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7005969\/7029433\/07029467.pdf?arnumber=7029467","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,23]],"date-time":"2017-03-23T20:56:46Z","timestamp":1490302606000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7029467\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,12]]},"references-count":14,"URL":"https:\/\/doi.org\/10.1109\/isicir.2014.7029467","relation":{},"subject":[],"published":{"date-parts":[[2014,12]]}}}