{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,27]],"date-time":"2025-10-27T16:11:58Z","timestamp":1761581518661},"reference-count":13,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2016,12]]},"DOI":"10.1109\/isicir.2016.7829726","type":"proceedings-article","created":{"date-parts":[[2017,1,26]],"date-time":"2017-01-26T23:10:09Z","timestamp":1485472209000},"page":"1-4","source":"Crossref","is-referenced-by-count":1,"title":["ESD protection design for high-speed circuits in nanoscale CMOS process"],"prefix":"10.1109","author":[{"given":"Chun-Yu","family":"Lin","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Rong-Kun","family":"Chang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2014.2374176"},{"key":"ref11","article-title":"FinFET SCR structure optimization for highspeed serial links ESD protection","author":"chu","year":"2016","journal-title":"Proc Int Reliability Physics Symp"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2015.2450225"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1016\/S0038-1101(00)00016-2"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ISICir.2011.6131909"},{"key":"ref3","first-page":"69","article-title":"Technology scaling of advanced bulk CMOS on-chip ESD protection down to the 32nm node","author":"li","year":"2009","journal-title":"Proc EOS\/ESD Symp"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2013.2279408"},{"key":"ref5","first-page":"129","article-title":"Transient electrical thermal analysis of ESD process using 3-D finite element method","author":"hou","year":"2009","journal-title":"Proc Int Symp Integr Circuits (ISIC'09)"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/IRPS.2014.6860652"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/IRPS.2010.5488722"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2242714"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2227612"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/EOSESD.2015.7314784"}],"event":{"name":"2016 International Symposium on Integrated Circuits (ISIC)","start":{"date-parts":[[2016,12,12]]},"location":"Singapore","end":{"date-parts":[[2016,12,14]]}},"container-title":["2016 International Symposium on Integrated Circuits (ISIC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7822827\/7829673\/07829726.pdf?arnumber=7829726","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2018,4,6]],"date-time":"2018-04-06T04:51:20Z","timestamp":1522990280000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7829726\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,12]]},"references-count":13,"URL":"https:\/\/doi.org\/10.1109\/isicir.2016.7829726","relation":{},"subject":[],"published":{"date-parts":[[2016,12]]}}}