{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,5]],"date-time":"2024-09-05T21:13:23Z","timestamp":1725570803983},"reference-count":11,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010,6]]},"DOI":"10.1109\/isit.2010.5513731","type":"proceedings-article","created":{"date-parts":[[2010,8,19]],"date-time":"2010-08-19T15:57:25Z","timestamp":1282233445000},"page":"2373-2377","source":"Crossref","is-referenced-by-count":4,"title":["Information-theoretic tradeoffs of throughput and chip power consumption for decoding error-correcting codes"],"prefix":"10.1109","author":[{"given":"Pulkit","family":"Grover","sequence":"first","affiliation":[]},{"given":"Hari","family":"Palaiyanur","sequence":"additional","affiliation":[]},{"given":"Anant","family":"Sahai","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","first-page":"284","article-title":"Low-power vlsi decoder architectures for ldpc codes","author":"mansour","year":"0","journal-title":"ISLPED '02 Proceedings of the 2002 international symposium on Low power electronics and design"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ISIT.2008.4595173"},{"key":"ref10","first-page":"4155","article-title":"Data fusion trees for detection: Does architecture matter","author":"tay","year":"2007","journal-title":"IEEE Trans Inform Theory"},{"key":"ref6","doi-asserted-by":"crossref","DOI":"10.1561\/9781933019857","author":"chen","year":"2006","journal-title":"FPGA Design Automation A Survey volume 1"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TIT.2008.920339"},{"journal-title":"The price of certainty “waterslide curves” and the gap to capacity","year":"2007","author":"sahai","key":"ref5"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ISIT.2010.5513731"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4757-3415-7"},{"key":"ref2","first-page":"286","article-title":"A 47 Gb\/s LDPC decoder with improved low error rate performance","author":"zhang","year":"2009","journal-title":"Symposium on VLSI Circuits"},{"journal-title":"A Complexity Theory for VLSI","year":"1980","author":"thompson","key":"ref9"},{"key":"ref1","article-title":"Impact of Processing Energy on the Capacity of Wireless Channels","author":"massaad","year":"0","journal-title":"International Symposium on Information Theory and its Applications (ISITA)"}],"event":{"name":"2010 IEEE International Symposium on Information Theory - ISIT","start":{"date-parts":[[2010,6,13]]},"location":"Austin, TX, USA","end":{"date-parts":[[2010,6,18]]}},"container-title":["2010 IEEE International Symposium on Information Theory"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5508195\/5513230\/05513731.pdf?arnumber=5513731","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,6,10]],"date-time":"2020-06-10T14:32:30Z","timestamp":1591799550000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5513731\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,6]]},"references-count":11,"URL":"https:\/\/doi.org\/10.1109\/isit.2010.5513731","relation":{},"subject":[],"published":{"date-parts":[[2010,6]]}}}