{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,5]],"date-time":"2026-02-05T10:31:43Z","timestamp":1770287503660,"version":"3.49.0"},"reference-count":15,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2013,9]]},"DOI":"10.1109\/islped.2013.6629270","type":"proceedings-article","created":{"date-parts":[[2013,12,17]],"date-time":"2013-12-17T20:47:27Z","timestamp":1387313247000},"page":"76-81","source":"Crossref","is-referenced-by-count":14,"title":["Energy minimization for fault tolerant real-time applications on multiprocessor platforms using checkpointing"],"prefix":"10.1109","author":[{"given":"Qiushi","family":"Han","sequence":"first","affiliation":[]},{"given":"Ming","family":"Fan","sequence":"additional","affiliation":[]},{"given":"Gang","family":"Quan","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"15","doi-asserted-by":"crossref","first-page":"197","DOI":"10.1145\/280756.280894","article-title":"Voltage scheduling problem for dynamically variable voltage processors","author":"ishihara","year":"1998","journal-title":"Proceedings 1998 International Symposium on Low Power Electronics and Design (IEEE Cat No 98TH8379) LPE"},{"key":"13","doi-asserted-by":"publisher","DOI":"10.1109\/RTCSA.2010.44"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2010.5457039"},{"key":"11","author":"asanovic","year":"2006","journal-title":"The Landscape of Parallel Computing Research A View from Berkeley"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1145\/1289816.1289873"},{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/RTAS.2005.20"},{"key":"2","doi-asserted-by":"crossref","first-page":"1370","DOI":"10.1109\/TCAD.2004.833602","article-title":"A unified approach to variable voltage scheduling for nonideal dvs processors","volume":"23","author":"mochocki","year":"2004","journal-title":"Computer-Aided Design of Integrated Circuits and Systems IEEE Transactions on"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/MCD.2005.1388765"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1109\/RTAS.2012.30"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2008.2003166"},{"key":"6","author":"srinivasan","year":"2003","journal-title":"RAMP A model for reliability aware microprocessor design"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2011.132"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/REDW.2007.4342566"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1016\/j.jss.2012.01.020"},{"key":"8","doi-asserted-by":"crossref","first-page":"111","DOI":"10.1109\/TCAD.2005.852657","article-title":"A unified approach for fault tolerance and dynamic power management in fixed-priority real-time embedded systems","volume":"25","author":"zhang","year":"2006","journal-title":"Computer-Aided Design of Integrated Circuits and Systems IEEE Transactions on"}],"event":{"name":"2013 IEEE International Symposium on Low Power Electronics and Design (ISLPED)","location":"Beijing, China","start":{"date-parts":[[2013,9,4]]},"end":{"date-parts":[[2013,9,6]]}},"container-title":["International Symposium on Low Power Electronics and Design (ISLPED)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6613639\/6629247\/06629270.pdf?arnumber=6629270","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,22]],"date-time":"2017-06-22T04:25:23Z","timestamp":1498105523000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6629270\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,9]]},"references-count":15,"URL":"https:\/\/doi.org\/10.1109\/islped.2013.6629270","relation":{},"subject":[],"published":{"date-parts":[[2013,9]]}}}