{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T22:52:32Z","timestamp":1725663152248},"reference-count":9,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2013,9]]},"DOI":"10.1109\/islped.2013.6629293","type":"proceedings-article","created":{"date-parts":[[2013,12,17]],"date-time":"2013-12-17T20:47:27Z","timestamp":1387313247000},"page":"193-198","source":"Crossref","is-referenced-by-count":12,"title":["Single-cycle, pulse-shaped critical path monitor in the POWER7+ microprocessor"],"prefix":"10.1109","author":[{"given":"Alan J.","family":"Drake","sequence":"first","affiliation":[]},{"given":"Michael S.","family":"Floyd","sequence":"additional","affiliation":[]},{"given":"Richard L.","family":"Willaman","sequence":"additional","affiliation":[]},{"given":"Derek J.","family":"Hathaway","sequence":"additional","affiliation":[]},{"given":"Joshua","family":"Hernandez","sequence":"additional","affiliation":[]},{"given":"Crystal","family":"Soja","sequence":"additional","affiliation":[]},{"given":"Marshall D.","family":"Tiner","sequence":"additional","affiliation":[]},{"given":"Gary D.","family":"Carpenter","sequence":"additional","affiliation":[]},{"given":"Robert M.","family":"Senger","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2010.5617415"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2089657"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1145\/2485922.2485948"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1145\/2155620.2155622"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2004.85"},{"key":"5","first-page":"398","article-title":"A distributed critical path timing monitor for a 65nm high-performance microprocessor","author":"drake","year":"2007","journal-title":"ISSCC"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.2007148"},{"key":"9","first-page":"112","article-title":"Tunable replica circuits and adaptive voltage-frequency techniques for dynamic voltage, temperature, and aging variation tolerance","author":"tschanz","year":"2009","journal-title":"VLSI Circuits Symposium"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2004.1332740"}],"event":{"name":"2013 IEEE International Symposium on Low Power Electronics and Design (ISLPED)","start":{"date-parts":[[2013,9,4]]},"location":"Beijing, China","end":{"date-parts":[[2013,9,6]]}},"container-title":["International Symposium on Low Power Electronics and Design (ISLPED)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6613639\/6629247\/06629293.pdf?arnumber=6629293","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,23]],"date-time":"2017-03-23T03:45:43Z","timestamp":1490240743000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6629293\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,9]]},"references-count":9,"URL":"https:\/\/doi.org\/10.1109\/islped.2013.6629293","relation":{},"subject":[],"published":{"date-parts":[[2013,9]]}}}