{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,21]],"date-time":"2026-03-21T21:15:10Z","timestamp":1774127710141,"version":"3.50.1"},"reference-count":37,"publisher":"IEEE","license":[{"start":{"date-parts":[[2019,7,1]],"date-time":"2019-07-01T00:00:00Z","timestamp":1561939200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2019,7,1]],"date-time":"2019-07-01T00:00:00Z","timestamp":1561939200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,7,1]],"date-time":"2019-07-01T00:00:00Z","timestamp":1561939200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2019,7]]},"DOI":"10.1109\/islped.2019.8824830","type":"proceedings-article","created":{"date-parts":[[2019,9,5]],"date-time":"2019-09-05T23:11:46Z","timestamp":1567725106000},"page":"1-6","source":"Crossref","is-referenced-by-count":47,"title":["RAPID: A ReRAM Processing in-Memory Architecture for DNA Sequence Alignment"],"prefix":"10.1109","author":[{"given":"Saransh","family":"Gupta","sequence":"first","affiliation":[]},{"given":"Mohsen","family":"Imani","sequence":"additional","affiliation":[]},{"given":"Behnam","family":"Khaleghi","sequence":"additional","affiliation":[]},{"given":"Venkatesh","family":"Kumar","sequence":"additional","affiliation":[]},{"given":"Tajana","family":"Rosing","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/TNANO.2014.2300342"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1145\/2678373.2665747"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2018.2875733"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1145\/3173162.3173193"},{"key":"ref37","doi-asserted-by":"crossref","DOI":"10.1109\/PACT.2019.00044","article-title":"Bioseal: In-memory biological sequence alignment accelerator for large-scale genomic data","author":"kaplan","year":"2019"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2014.6757460"},{"key":"ref35","first-page":"994","article-title":"Nvsim: A circuit-level performance, energy, and area model for emerging nonvolatile memory","volume":"31","author":"dong","year":"2012","journal-title":"IEEE TCAD"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1145\/3287624.3287711"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/2.375174"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/2749469.2750385"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/2897937.2898064"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2019.2903055"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1016\/0022-2836(81)90087-5"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1126\/science.2983426"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1145\/3240765.3240811"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TNANO.2016.2570248"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2014.2357292"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1038\/nature08940"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/LCA.2018.2854700"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1016\/0022-2836(70)90057-4"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1145\/3195970.3196098"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1098\/rstb.2012.0205"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/CLUSTER.2014.6968772"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/TBCAS.2017.2760109"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1006\/jmbi.1990.9999"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-08019-2_40"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2016.2515597"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1186\/1471-2148-7-214"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TCBB.2016.2535385"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1161\/CIRCULATIONAHA.110.972828"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1145\/3299874.3319483"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1002\/adfm.201704725"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1145\/3299874.3318011"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1145\/3307650.3322237"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2015.2433536"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2017.3211121"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1145\/3061639.3062337"}],"event":{"name":"2019 IEEE\/ACM International Symposium on Low Power Electronics and Design (ISLPED)","location":"Lausanne, Switzerland","start":{"date-parts":[[2019,7,29]]},"end":{"date-parts":[[2019,7,31]]}},"container-title":["2019 IEEE\/ACM International Symposium on Low Power Electronics and Design (ISLPED)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8819888\/8824790\/08824830.pdf?arnumber=8824830","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,7,15]],"date-time":"2022-07-15T03:15:27Z","timestamp":1657854927000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8824830\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,7]]},"references-count":37,"URL":"https:\/\/doi.org\/10.1109\/islped.2019.8824830","relation":{},"subject":[],"published":{"date-parts":[[2019,7]]}}}