{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,8]],"date-time":"2025-10-08T15:09:35Z","timestamp":1759936175204},"reference-count":21,"publisher":"IEEE","license":[{"start":{"date-parts":[[2019,7,1]],"date-time":"2019-07-01T00:00:00Z","timestamp":1561939200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2019,7,1]],"date-time":"2019-07-01T00:00:00Z","timestamp":1561939200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,7,1]],"date-time":"2019-07-01T00:00:00Z","timestamp":1561939200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2019,7]]},"DOI":"10.1109\/islped.2019.8824979","type":"proceedings-article","created":{"date-parts":[[2019,9,5]],"date-time":"2019-09-05T19:11:46Z","timestamp":1567710706000},"page":"1-6","source":"Crossref","is-referenced-by-count":10,"title":["SHINE: A Novel SHA-3 Implementation Using ReRAM-based In-Memory Computing"],"prefix":"10.1109","author":[{"given":"Karthikeyan","family":"Nagarajan","sequence":"first","affiliation":[]},{"given":"Sina Sayyah","family":"Ensan","sequence":"additional","affiliation":[]},{"given":"Mohammad","family":"Nasim Imtiaz Khan","sequence":"additional","affiliation":[]},{"given":"Swaroop","family":"Ghosh","sequence":"additional","affiliation":[]},{"given":"Anupam","family":"Chattopadhyay","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2017.7918336"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-40349-1_8"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ESSCIRC.2010.5619892"},{"key":"ref13","article-title":"Dynamic Computing in Memory (DCIM) in Resistive Crossbar Arrays","author":"motaman","year":"2019","journal-title":"ICCD"},{"year":"2015","key":"ref14","article-title":"SHA-3 Standard: Permutation-Based Hash and Extendable-Output Functions"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-38348-9_19"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2015.2492421"},{"key":"ref17","article-title":"FPCAS: In-Memory Foating Point Computations for Autonomous Systems","author":"ensan","year":"2019","journal-title":"IJCNN"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1016\/j.aeue.2018.12.015"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2018.8351649"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/2966986.2967069"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/2897937.2898010"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2015.2439635"},{"key":"ref5","first-page":"280","article-title":"An energy-efficient matrix multiplication accelerator by distributed in-memory computing on binary RRAM crossbar","author":"ni","year":"2016","journal-title":"2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC) ASP-DAC"},{"key":"ref8","first-page":"242","article-title":"Memristor-based approximated computation","author":"li","year":"2013","journal-title":"Proc Int Symp Low-Power Electronics Design"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2012.6479018"},{"article-title":"High-Speed Hardware Implementations of BLAKE, Blue Midnight Wish, CubeHash, ECHO, Fugue, Grøstl, Hamsi, JH, Keccak, Luffa, Shabal, SHAvite-3, SIMD, and Skein","year":"2009","author":"tillich","key":"ref2"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/1854099.1854135"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/HST.2017.7951797"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2012.6237004"},{"key":"ref21","article-title":"Implementation of the Keccak hash function in FPGA devices","author":"str\u00f6mbergson","year":"2008","journal-title":"Techical Report"}],"event":{"name":"2019 IEEE\/ACM International Symposium on Low Power Electronics and Design (ISLPED)","start":{"date-parts":[[2019,7,29]]},"location":"Lausanne, Switzerland","end":{"date-parts":[[2019,7,31]]}},"container-title":["2019 IEEE\/ACM International Symposium on Low Power Electronics and Design (ISLPED)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8819888\/8824790\/08824979.pdf?arnumber=8824979","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,7,14]],"date-time":"2022-07-14T23:15:27Z","timestamp":1657840527000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8824979\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,7]]},"references-count":21,"URL":"https:\/\/doi.org\/10.1109\/islped.2019.8824979","relation":{},"subject":[],"published":{"date-parts":[[2019,7]]}}}