{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,17]],"date-time":"2025-12-17T18:13:44Z","timestamp":1765995224983,"version":"build-2065373602"},"reference-count":16,"publisher":"IEEE","license":[{"start":{"date-parts":[[2023,8,7]],"date-time":"2023-08-07T00:00:00Z","timestamp":1691366400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2023,8,7]],"date-time":"2023-08-07T00:00:00Z","timestamp":1691366400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2023,8,7]]},"DOI":"10.1109\/islped58423.2023.10244708","type":"proceedings-article","created":{"date-parts":[[2023,9,19]],"date-time":"2023-09-19T17:38:53Z","timestamp":1695145133000},"page":"1-6","source":"Crossref","is-referenced-by-count":3,"title":["Efficient Multi-Objective Optimization for PVT Variation-Aware Circuit Sizing Using Surrogate Models and Smart Corner Sampling"],"prefix":"10.1109","author":[{"given":"Octavian","family":"Pascu","sequence":"first","affiliation":[{"name":"University “Politehnica” of Bucharest"}]},{"given":"Catalin","family":"Visan","sequence":"additional","affiliation":[{"name":"University “Politehnica” of Bucharest"}]},{"given":"Georgian","family":"Nicolae","sequence":"additional","affiliation":[{"name":"University “Politehnica” of Bucharest"}]},{"given":"Mihai","family":"Boldeanu","sequence":"additional","affiliation":[{"name":"University “Politehnica” of Bucharest"}]},{"given":"Horia","family":"Cucu","sequence":"additional","affiliation":[{"name":"University “Politehnica” of Bucharest"}]},{"given":"Cristian","family":"Diaconu","sequence":"additional","affiliation":[{"name":"Infineon Technologies"}]},{"given":"Andi","family":"Buzo","sequence":"additional","affiliation":[{"name":"Infineon Technologies"}]},{"given":"Georg","family":"Pelz","sequence":"additional","affiliation":[{"name":"Infineon Technologies"}]}],"member":"263","reference":[{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.3850\/9783981537079_0173"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2013.2256436"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1007\/s00158-016-1469-3"},{"key":"ref14","doi-asserted-by":"crossref","first-page":"109987","DOI":"10.1016\/j.knosys.2022.109987","article-title":"Automated circuit sizing with multi-objective optimization based on differential evolution and bayesian inference","volume":"258","author":"vi?an","year":"2022","journal-title":"Knowledge-Based Systems"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/SpeD53181.2021.9587352"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/CAS52836.2021.9604128"},{"key":"ref2","first-page":"1","article-title":"Multi-objective bayesian optimization for analog\/rf circuit synthesis","author":"lyu","year":"0","journal-title":"2018 55th ACM\/ESDA\/IEEE Design Automation Conference (DAC) DAC"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/43.848091"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1038\/s41598-020-60652-9"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1016\/j.vlsi.2016.04.009"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/4235.996017"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2017.7927171"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2017.2768826"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/1055137.1055148"},{"key":"ref6","first-page":"2678","article-title":"A general frame-work of dynamic constrained multiobjective evolutionary algorithms for constrained optimization","volume":"47","author":"zeng","year":"2017","journal-title":"IEEE Transactions on Cybernetics"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TEVC.2018.2855411"}],"event":{"name":"2023 IEEE\/ACM International Symposium on Low Power Electronics and Design (ISLPED)","start":{"date-parts":[[2023,8,7]]},"location":"Vienna, Austria","end":{"date-parts":[[2023,8,8]]}},"container-title":["2023 IEEE\/ACM International Symposium on Low Power Electronics and Design (ISLPED)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/10244176\/10244185\/10244708.pdf?arnumber=10244708","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,10,9]],"date-time":"2023-10-09T17:58:59Z","timestamp":1696874339000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10244708\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,8,7]]},"references-count":16,"URL":"https:\/\/doi.org\/10.1109\/islped58423.2023.10244708","relation":{},"subject":[],"published":{"date-parts":[[2023,8,7]]}}}