{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,4]],"date-time":"2025-12-04T08:32:34Z","timestamp":1764837154545,"version":"3.46.0"},"reference-count":4,"publisher":"IEEE","license":[{"start":{"date-parts":[[2025,8,6]],"date-time":"2025-08-06T00:00:00Z","timestamp":1754438400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,8,6]],"date-time":"2025-08-06T00:00:00Z","timestamp":1754438400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2025,8,6]]},"DOI":"10.1109\/islped65674.2025.11261774","type":"proceedings-article","created":{"date-parts":[[2025,12,3]],"date-time":"2025-12-03T18:39:13Z","timestamp":1764787153000},"page":"1-2","source":"Crossref","is-referenced-by-count":0,"title":["Demo Abstract: A Low-Power Real-Time Hardware Accelerator for Edge Detection Using Stochastic Computing"],"prefix":"10.1109","author":[{"given":"Priyajit","family":"Ghosh","sequence":"first","affiliation":[{"name":"Jadavpur University,West Bengal,India"}]},{"given":"Rajarshi","family":"Mukherjee","sequence":"additional","affiliation":[{"name":"Jadavpur University,West Bengal,India"}]},{"given":"Auro Anand","family":"Saha","sequence":"additional","affiliation":[{"name":"Jadavpur University,West Bengal,India"}]},{"given":"Sutirtha","family":"Naha","sequence":"additional","affiliation":[{"name":"Jadavpur University,West Bengal,India"}]},{"given":"Arghadip","family":"Das","sequence":"additional","affiliation":[{"name":"Purdue University,IN,USA"}]},{"given":"Arnab","family":"Raha","sequence":"additional","affiliation":[{"name":"Intel Corporation,CA,USA"}]},{"given":"Mrinal Kanti","family":"Naskar","sequence":"additional","affiliation":[{"name":"Jadavpur University,West Bengal,India"}]}],"member":"263","reference":[{"volume-title":"Digital Design: An Embedded Systems Approach Using Verilog","year":"2008","author":"Ashenden","key":"ref1"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/2463209.2488901"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2017.7858369"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2017.2778107"}],"event":{"name":"2025 IEEE\/ACM International Symposium on Low Power Electronics and Design (ISLPED)","start":{"date-parts":[[2025,8,6]]},"location":"Reykjav\u00edk, Iceland","end":{"date-parts":[[2025,8,8]]}},"container-title":["2025 IEEE\/ACM International Symposium on Low Power Electronics and Design (ISLPED)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/11261694\/11261695\/11261774.pdf?arnumber=11261774","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,12,4]],"date-time":"2025-12-04T08:28:47Z","timestamp":1764836927000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11261774\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,8,6]]},"references-count":4,"URL":"https:\/\/doi.org\/10.1109\/islped65674.2025.11261774","relation":{},"subject":[],"published":{"date-parts":[[2025,8,6]]}}}