{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,9]],"date-time":"2026-04-09T20:46:41Z","timestamp":1775767601262,"version":"3.50.1"},"reference-count":11,"publisher":"IEEE","license":[{"start":{"date-parts":[[2011,11,1]],"date-time":"2011-11-01T00:00:00Z","timestamp":1320105600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2011,11,1]],"date-time":"2011-11-01T00:00:00Z","timestamp":1320105600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2011,11]]},"DOI":"10.1109\/isocc.2011.6138770","type":"proceedings-article","created":{"date-parts":[[2012,1,31]],"date-time":"2012-01-31T16:36:42Z","timestamp":1328027802000},"page":"302-305","source":"Crossref","is-referenced-by-count":2,"title":["Statistical modeling of capacitor mismatch effects for successive approximation register ADCs"],"prefix":"10.1109","author":[{"given":"YoungJoo","family":"Lee","sequence":"first","affiliation":[{"name":"Department of Electrical Engineering, KAIST, Daejeon, Republic of Korea"}]},{"given":"Jinook","family":"Song","sequence":"additional","affiliation":[{"name":"Department of Electrical Engineering, KAIST, Daejeon, Republic of Korea"}]},{"given":"In-Cheol","family":"Park","sequence":"additional","affiliation":[{"name":"Department of Electrical Engineering, KAIST, Daejeon, Republic of Korea"}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1975.1050629"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.897157"},{"key":"ref10","article-title":"Analog Integrated Circuit Design","author":"johns","year":"1997"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/IITA.2009.193"},{"key":"ref11","author":"surhone","year":"2010","journal-title":"Ratio distribution"},{"key":"ref5","first-page":"590","article-title":"Accuracy Considerations in Self-Calibrating A\/D Converters","volume":"cas 32","author":"lee","year":"1985","journal-title":"IEEE Trans Circuits Syst"},{"key":"ref8","first-page":"300","article-title":"Modeling of Capacitor mismatch and Non-Linearity effect in Charge Redistribution SAR ADC","author":"haenzsche","year":"2010","journal-title":"Proc Int Conf Mixed Design Integr Circuits Syst (MIXDES'06)"},{"key":"ref7","first-page":"982","article-title":"Modeling of Capacitor Array Mismatch Effect in Embedded CMOS CR SAR ADC","volume":"2","author":"lin","year":"2005","journal-title":"Proc 4th Int Conf ASIC (ASICON)"},{"key":"ref2","first-page":"248","article-title":"A 14b 40MS\/s redundant SAR ADC with 480MHz clock in 0.13J?m CMOS","author":"hesener","year":"2007"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1287\/mnsc.21.11.1338"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2014707"}],"event":{"name":"2011 International SoC Design Conference (ISOCC 2011)","location":"Jeju, Korea (South)","start":{"date-parts":[[2011,11,17]]},"end":{"date-parts":[[2011,11,18]]}},"container-title":["2011 International SoC Design Conference"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/6126155\/6138611\/06138770.pdf?arnumber=6138770","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,4,9]],"date-time":"2026-04-09T19:44:01Z","timestamp":1775763841000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/6138770\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,11]]},"references-count":11,"URL":"https:\/\/doi.org\/10.1109\/isocc.2011.6138770","relation":{},"subject":[],"published":{"date-parts":[[2011,11]]}}}