{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,8,21]],"date-time":"2025-08-21T16:13:46Z","timestamp":1755792826642,"version":"3.44.0"},"reference-count":4,"publisher":"IEEE","license":[{"start":{"date-parts":[[2016,10,1]],"date-time":"2016-10-01T00:00:00Z","timestamp":1475280000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2016,10,1]],"date-time":"2016-10-01T00:00:00Z","timestamp":1475280000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2016,10]]},"DOI":"10.1109\/isocc.2016.7799815","type":"proceedings-article","created":{"date-parts":[[2016,12,29]],"date-time":"2016-12-29T16:50:06Z","timestamp":1483030206000},"page":"337-338","source":"Crossref","is-referenced-by-count":0,"title":["A system-level design of MapReduce-based embedded multiprocessor system-on-chips"],"prefix":"10.1109","author":[{"given":"Huajuan","family":"Zhang","sequence":"first","affiliation":[{"name":"College of Electronic and Information Engineering, Nanjing University of Aeronautics and Astronautics, Nanjing 210016, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Hao","family":"Xiao","sequence":"additional","affiliation":[{"name":"College of Electronic and Information Engineering, Nanjing University of Aeronautics and Astronautics, Nanjing 210016, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ning","family":"Wu","sequence":"additional","affiliation":[{"name":"College of Electronic and Information Engineering, Nanjing University of Aeronautics and Astronautics, Nanjing 210016, China"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.2197\/ipsjtsldm.5.118"},{"key":"ref3","first-page":"93","author":"shan","year":"2010","journal-title":"ACM Int Symp FPGA s"},{"key":"ref2","doi-asserted-by":"crossref","first-page":"608","DOI":"10.1109\/TPDS.2010.158","volume":"22","author":"fang","year":"0","journal-title":"IEEE Trans Parallel Distrib Syst"},{"key":"ref1","first-page":"107","volume":"51","author":"dean","year":"2008","journal-title":"Commun"}],"event":{"name":"2016 International SoC Design Conference (ISOCC)","start":{"date-parts":[[2016,10,23]]},"location":"Jeju, Korea (South)","end":{"date-parts":[[2016,10,26]]}},"container-title":["2016 International SoC Design Conference (ISOCC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7787093\/7799693\/07799815.pdf?arnumber=7799815","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,8,14]],"date-time":"2025-08-14T18:41:21Z","timestamp":1755196881000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/7799815\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,10]]},"references-count":4,"URL":"https:\/\/doi.org\/10.1109\/isocc.2016.7799815","relation":{},"subject":[],"published":{"date-parts":[[2016,10]]}}}