{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,30]],"date-time":"2024-10-30T08:04:55Z","timestamp":1730275495322,"version":"3.28.0"},"reference-count":6,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2016,10]]},"DOI":"10.1109\/isocc.2016.7799824","type":"proceedings-article","created":{"date-parts":[[2016,12,29]],"date-time":"2016-12-29T16:50:06Z","timestamp":1483030206000},"page":"355-356","source":"Crossref","is-referenced-by-count":1,"title":["FPGA power estimation simulator for dynamic input data"],"prefix":"10.1109","author":[{"given":"Taehee","family":"You","sequence":"first","affiliation":[]},{"given":"Jeongbin","family":"Kim","sequence":"additional","affiliation":[]},{"given":"Minyoung","family":"Im","sequence":"additional","affiliation":[]},{"given":"Eui-Young","family":"Chung","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","first-page":"149","article-title":"Odin II-an open-source verilog HDL synthesis tool for CAD research","author":"peter","year":"2010","journal-title":"FCCM 2010 18th IEEE Annual International Symposium on IEEE"},{"key":"ref3","first-page":"1712","article-title":"Power Modeling and Characteristics of Field Programmable Gate Arrays","volume":"24","author":"li","year":"2005","journal-title":"IEEE TCAD"},{"key":"ref6","first-page":"213","article-title":"VPR: A new packing, placement and routing tool for FPGA research","author":"vaughn","year":"1997","journal-title":"Field-Programmable Logic and Applications"},{"key":"ref5","first-page":"24","article-title":"ABC: An academic industrial-strength verification tool","author":"robert","year":"2010","journal-title":"Computer Aided Verification"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2015.7357183"},{"key":"ref1","first-page":"135","article-title":"FPGA architecture: Survey and challenges","author":"ian","year":"2008","journal-title":"Foundations and Trends\ufffd in Electronic Design Automation"}],"event":{"name":"2016 International SoC Design Conference (ISOCC)","start":{"date-parts":[[2016,10,23]]},"location":"Jeju, South Korea","end":{"date-parts":[[2016,10,26]]}},"container-title":["2016 International SoC Design Conference (ISOCC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7787093\/7799693\/07799824.pdf?arnumber=7799824","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,1,20]],"date-time":"2017-01-20T07:06:41Z","timestamp":1484896001000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7799824\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,10]]},"references-count":6,"URL":"https:\/\/doi.org\/10.1109\/isocc.2016.7799824","relation":{},"subject":[],"published":{"date-parts":[[2016,10]]}}}