{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,30]],"date-time":"2026-04-30T17:02:07Z","timestamp":1777568527549,"version":"3.51.4"},"reference-count":7,"publisher":"IEEE","license":[{"start":{"date-parts":[[2017,11,1]],"date-time":"2017-11-01T00:00:00Z","timestamp":1509494400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2017,11,1]],"date-time":"2017-11-01T00:00:00Z","timestamp":1509494400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2017,11]]},"DOI":"10.1109\/isocc.2017.8368879","type":"proceedings-article","created":{"date-parts":[[2018,6,22]],"date-time":"2018-06-22T18:04:36Z","timestamp":1529690676000},"page":"252-253","source":"Crossref","is-referenced-by-count":2,"title":["A low-power SerDes for high-speed on-chip networks"],"prefix":"10.1109","author":[{"given":"Dongjun","family":"Park","sequence":"first","affiliation":[{"name":"School of Electronic and Electrical Engineering, Hongik University, Seoul, Korea"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Junsub","family":"Yoon","sequence":"additional","affiliation":[{"name":"School of Electronic and Electrical Engineering, Hongik University, Seoul, Korea"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jongsun","family":"Kim","sequence":"additional","affiliation":[{"name":"School of Electronic and Electrical Engineering, Hongik University, Seoul, Korea"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","first-page":"222","article-title":"A 2.8 Gb\/s all-digital CDR with a 10b monotonic DCO","author":"oh","year":"2007","journal-title":"IEEE Int Solid-State Circuits Conf Dig Tech Papers"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2001.934223"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2164032"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2168872"},{"key":"ref7","first-page":"1036","article-title":"A reference-less clock and data recovery circuit using phase-rotating phase-locked loop","author":"shu","year":"2011","journal-title":"IEEE J Solid-State Circuits"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/EPEPS.2016.7835406"},{"key":"ref1","first-page":"17","article-title":"10 Gbps SerDes for wireless chip-to-chip communication","author":"han","year":"2015","journal-title":"International SoC Design Conference"}],"event":{"name":"2017 International SoC Design Conference (ISOCC)","location":"Seoul, Korea (South)","start":{"date-parts":[[2017,11,5]]},"end":{"date-parts":[[2017,11,8]]}},"container-title":["2017 International SoC Design Conference (ISOCC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8362894\/8368771\/08368879.pdf?arnumber=8368879","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,8,19]],"date-time":"2025-08-19T18:08:45Z","timestamp":1755626925000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8368879\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,11]]},"references-count":7,"URL":"https:\/\/doi.org\/10.1109\/isocc.2017.8368879","relation":{},"subject":[],"published":{"date-parts":[[2017,11]]}}}