{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,11]],"date-time":"2026-03-11T16:37:31Z","timestamp":1773247051294,"version":"3.50.1"},"reference-count":4,"publisher":"IEEE","license":[{"start":{"date-parts":[[2017,11,1]],"date-time":"2017-11-01T00:00:00Z","timestamp":1509494400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2017,11,1]],"date-time":"2017-11-01T00:00:00Z","timestamp":1509494400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2017,11]]},"DOI":"10.1109\/isocc.2017.8368899","type":"proceedings-article","created":{"date-parts":[[2018,6,22]],"date-time":"2018-06-22T18:04:36Z","timestamp":1529690676000},"page":"288-289","source":"Crossref","is-referenced-by-count":4,"title":["Energy-efficient write circuit in STT-MRAM based look-up table (LUT) using comparison write scheme"],"prefix":"10.1109","author":[{"given":"Seungjin","family":"Lee","sequence":"first","affiliation":[{"name":"School of Electrical and Electronic Engineering, Yonsei University, Seoul, Korea"}]},{"given":"Taegun","family":"Yim","sequence":"additional","affiliation":[{"name":"School of Electrical and Electronic Engineering, Yonsei University, Seoul, Korea"}]},{"given":"Choongkeun","family":"Lee","sequence":"additional","affiliation":[{"name":"School of Electrical and Electronic Engineering, Yonsei University, Seoul, Korea"}]},{"given":"Kyungseon","family":"Cho","sequence":"additional","affiliation":[{"name":"School of Electrical and Electronic Engineering, Yonsei University, Seoul, Korea"}]},{"given":"Hongil","family":"Yoon","sequence":"additional","affiliation":[{"name":"School of Electrical and Electronic Engineering, Yonsei University, Seoul, Korea"}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2011.2178416"},{"key":"ref3","first-page":"110c","article-title":"A 1.5 nsec\/2.1 nsec random read\/write cycle 1Mb STT-RAM using 6T2MTJ cell with background write for nonvolatile e-memories","author":"ohsawa","year":"2013","journal-title":"Symp VLSI Circuits Dig Tech Papers"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2253412"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TMAG.2014.2322387"}],"event":{"name":"2017 International SoC Design Conference (ISOCC)","location":"Seoul, Korea (South)","start":{"date-parts":[[2017,11,5]]},"end":{"date-parts":[[2017,11,8]]}},"container-title":["2017 International SoC Design Conference (ISOCC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8362894\/8368771\/08368899.pdf?arnumber=8368899","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,8,19]],"date-time":"2025-08-19T18:08:44Z","timestamp":1755626924000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8368899\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,11]]},"references-count":4,"URL":"https:\/\/doi.org\/10.1109\/isocc.2017.8368899","relation":{},"subject":[],"published":{"date-parts":[[2017,11]]}}}