{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,8]],"date-time":"2024-09-08T14:21:19Z","timestamp":1725805279310},"reference-count":9,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2018,11]]},"DOI":"10.1109\/isocc.2018.8649885","type":"proceedings-article","created":{"date-parts":[[2019,2,25]],"date-time":"2019-02-25T21:10:07Z","timestamp":1551129007000},"page":"233-234","source":"Crossref","is-referenced-by-count":4,"title":["Low-Power Null Convention Logic Multiplier Design Based On Gate Diffusion Input Technique"],"prefix":"10.1109","author":[{"given":"Prashanthi","family":"Metku","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Kyung Ki","family":"Kim","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yong-Bin","family":"Kim","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Minsu","family":"Choi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"doi-asserted-by":"publisher","key":"ref4","DOI":"10.1016\/j.mee.2006.02.012"},{"key":"ref3","first-page":"13","article-title":"Asynchronous circuit design using new high speed ncl gates","author":"choi","year":"2014","journal-title":"Proc Int SoC Design Conf (ISOCC)"},{"doi-asserted-by":"publisher","key":"ref6","DOI":"10.1016\/S1383-7621(02)00060-7"},{"doi-asserted-by":"publisher","key":"ref5","DOI":"10.1016\/j.vlsi.2003.12.004"},{"doi-asserted-by":"publisher","key":"ref8","DOI":"10.1016\/j.vlsi.2013.04.002"},{"doi-asserted-by":"publisher","key":"ref7","DOI":"10.1109\/EEEI.2010.5662107"},{"key":"ref2","article-title":"Gate and throughput optimizations for null convention self-timed digital circuits","author":"smith","year":"2001","journal-title":"Ph D Dissertation"},{"doi-asserted-by":"publisher","key":"ref9","DOI":"10.1109\/ASIC.2001.954670"},{"doi-asserted-by":"publisher","key":"ref1","DOI":"10.1109\/TVLSI.2007.898726"}],"event":{"name":"2018 International SoC Design Conference (ISOCC)","start":{"date-parts":[[2018,11,12]]},"location":"Daegu, Korea (South)","end":{"date-parts":[[2018,11,15]]}},"container-title":["2018 International SoC Design Conference (ISOCC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8648165\/8649799\/08649885.pdf?arnumber=8649885","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,27]],"date-time":"2022-01-27T00:30:48Z","timestamp":1643243448000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8649885\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,11]]},"references-count":9,"URL":"https:\/\/doi.org\/10.1109\/isocc.2018.8649885","relation":{},"subject":[],"published":{"date-parts":[[2018,11]]}}}