{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,5]],"date-time":"2024-09-05T21:57:20Z","timestamp":1725573440954},"reference-count":6,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2018,11]]},"DOI":"10.1109\/isocc.2018.8649929","type":"proceedings-article","created":{"date-parts":[[2019,2,25]],"date-time":"2019-02-25T21:10:07Z","timestamp":1551129007000},"page":"271-272","source":"Crossref","is-referenced-by-count":0,"title":["Energy Efficient Analog Synapse\/Neuron Circuit for Binarized Neural Networks"],"prefix":"10.1109","author":[{"given":"Jaehyun","family":"Kim","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Chaeun","family":"Lee","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Kiyoung","family":"Choi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"article-title":"Binarized neural networks: Training deep neural networks with weights and activations constrained to +1 or -1","year":"2016","author":"courbariaux","key":"ref4"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/1390156.1390177"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.3390\/make1010005"},{"key":"ref5","article-title":"An always-on 3.8 µJ\/86% CIFAR-10 mixed-signal binary CNN processor with all memory on chip in 28nm CMOS","author":"bankman","year":"2018","journal-title":"Proc ISSCC"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/MSP.2012.2205597"},{"key":"ref1","article-title":"Imagenet classification with deep convolutional neural networks","author":"krizhevsky","year":"2012","journal-title":"Proc NIPS"}],"event":{"name":"2018 International SoC Design Conference (ISOCC)","start":{"date-parts":[[2018,11,12]]},"location":"Daegu, Korea (South)","end":{"date-parts":[[2018,11,15]]}},"container-title":["2018 International SoC Design Conference (ISOCC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8648165\/8649799\/08649929.pdf?arnumber=8649929","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,27]],"date-time":"2022-01-27T02:01:14Z","timestamp":1643248874000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8649929\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,11]]},"references-count":6,"URL":"https:\/\/doi.org\/10.1109\/isocc.2018.8649929","relation":{},"subject":[],"published":{"date-parts":[[2018,11]]}}}