{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,2,21]],"date-time":"2025-02-21T01:13:01Z","timestamp":1740100381735,"version":"3.37.3"},"reference-count":6,"publisher":"IEEE","license":[{"start":{"date-parts":[[2021,10,6]],"date-time":"2021-10-06T00:00:00Z","timestamp":1633478400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2021,10,6]],"date-time":"2021-10-06T00:00:00Z","timestamp":1633478400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2021,10,6]],"date-time":"2021-10-06T00:00:00Z","timestamp":1633478400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100001321","name":"National Research Foundation","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100001321","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2021,10,6]]},"DOI":"10.1109\/isocc53507.2021.9613940","type":"proceedings-article","created":{"date-parts":[[2021,11,25]],"date-time":"2021-11-25T20:31:55Z","timestamp":1637872315000},"page":"311-312","source":"Crossref","is-referenced-by-count":0,"title":["A 7.68 GHz Fast-Lock Low-Jitter Digital MDLL"],"prefix":"10.1109","author":[{"given":"Junghoon","family":"Jin","sequence":"first","affiliation":[]},{"given":"Seungjun","family":"Kim","sequence":"additional","affiliation":[]},{"given":"Sunguk","family":"Choi","sequence":"additional","affiliation":[]},{"given":"Pil-ho","family":"Lee","sequence":"additional","affiliation":[]},{"given":"Sang-jae","family":"Rhee","sequence":"additional","affiliation":[]},{"given":"Ki-hwan","family":"Choi","sequence":"additional","affiliation":[]},{"given":"Jongsun","family":"Kim","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1049\/el.2013.2857"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1587\/elex.17.20200296"},{"key":"ref6","first-page":"466","article-title":"A4.6GHz MDLL with -46dBc reference spur and aperture position tuning","author":"ali","year":"0","journal-title":"ISSCC 2011"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2017.2688369"},{"key":"ref2","first-page":"1","volume":"10","author":"park","year":"2021","journal-title":"Electronics"},{"key":"ref1","doi-asserted-by":"crossref","first-page":"1804","DOI":"10.1109\/JSSC.2002.804340","article-title":"A low-power multiplying DLL for low-jitter multigigahertz clock generation in highly integrated digital chips","volume":"37","author":"farjad-rad","year":"2002","journal-title":"IEEE J of Solid-State Circuits"}],"event":{"name":"2021 18th International SoC Design Conference (ISOCC)","start":{"date-parts":[[2021,10,6]]},"location":"Jeju Island, Korea, Republic of","end":{"date-parts":[[2021,10,9]]}},"container-title":["2021 18th International SoC Design Conference (ISOCC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9613844\/9613845\/09613940.pdf?arnumber=9613940","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,5,10]],"date-time":"2022-05-10T16:52:34Z","timestamp":1652201554000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9613940\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,10,6]]},"references-count":6,"URL":"https:\/\/doi.org\/10.1109\/isocc53507.2021.9613940","relation":{},"subject":[],"published":{"date-parts":[[2021,10,6]]}}}