{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,30]],"date-time":"2024-10-30T08:08:07Z","timestamp":1730275687067,"version":"3.28.0"},"reference-count":2,"publisher":"IEEE","license":[{"start":{"date-parts":[[2022,10,19]],"date-time":"2022-10-19T00:00:00Z","timestamp":1666137600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2022,10,19]],"date-time":"2022-10-19T00:00:00Z","timestamp":1666137600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2022,10,19]]},"DOI":"10.1109\/isocc56007.2022.10031293","type":"proceedings-article","created":{"date-parts":[[2023,2,7]],"date-time":"2023-02-07T19:12:27Z","timestamp":1675797147000},"page":"338-339","source":"Crossref","is-referenced-by-count":0,"title":["Memory-Access Optimization for Acceleration and Power Saving of FPGA-Based Image Processing"],"prefix":"10.1109","author":[{"given":"Shungo","family":"Shimohane","sequence":"first","affiliation":[{"name":"The University of Shiga Prefecture,Department of Electronic Systems Engineering,Shiga,Japan,522\u20138533"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Toshiyuki","family":"Inoue","sequence":"additional","affiliation":[{"name":"The University of Shiga Prefecture,Department of Electronic Systems Engineering,Shiga,Japan,522\u20138533"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Akira","family":"Tsuchiya","sequence":"additional","affiliation":[{"name":"The University of Shiga Prefecture,Department of Electronic Systems Engineering,Shiga,Japan,522\u20138533"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Keiji","family":"Kishine","sequence":"additional","affiliation":[{"name":"The University of Shiga Prefecture,Department of Electronic Systems Engineering,Shiga,Japan,522\u20138533"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref1","first-page":"205","article-title":"Methods to reduce DRAM accesses in CNN hardware","volume":"V1","author":"Hurukawa","year":"2018","journal-title":"17th Forum on Information Science and Technology"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.5573\/JSTS.2021.21.1.029"}],"event":{"name":"2022 19th International SoC Design Conference (ISOCC)","start":{"date-parts":[[2022,10,19]]},"location":"Gangneung-si, Korea, Republic of","end":{"date-parts":[[2022,10,22]]}},"container-title":["2022 19th International SoC Design Conference (ISOCC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/10031262\/10031265\/10031293.pdf?arnumber=10031293","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,2,13]],"date-time":"2024-02-13T11:36:26Z","timestamp":1707824186000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10031293\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,10,19]]},"references-count":2,"URL":"https:\/\/doi.org\/10.1109\/isocc56007.2022.10031293","relation":{},"subject":[],"published":{"date-parts":[[2022,10,19]]}}}