{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,1,11]],"date-time":"2025-01-11T05:33:59Z","timestamp":1736573639752,"version":"3.32.0"},"reference-count":8,"publisher":"IEEE","license":[{"start":{"date-parts":[[2024,8,19]],"date-time":"2024-08-19T00:00:00Z","timestamp":1724025600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2024,8,19]],"date-time":"2024-08-19T00:00:00Z","timestamp":1724025600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2024,8,19]]},"DOI":"10.1109\/isocc62682.2024.10762338","type":"proceedings-article","created":{"date-parts":[[2024,11,29]],"date-time":"2024-11-29T18:49:10Z","timestamp":1732906150000},"page":"302-303","source":"Crossref","is-referenced-by-count":0,"title":["22\/16nm High Speed and Area Efficient Automotive Grade STT-MRAM Memory Compiler for 2~128Mb"],"prefix":"10.1109","author":[{"given":"S.","family":"Kumar","sequence":"first","affiliation":[{"name":"Synopsys,Noida,India"}]},{"given":"V.","family":"Kumar","sequence":"additional","affiliation":[{"name":"Synopsys,Noida,India"}]},{"given":"A.","family":"Antonyan","sequence":"additional","affiliation":[{"name":"Synopsys,Sunnyvale,USA"}]},{"given":"B.","family":"Prickett","sequence":"additional","affiliation":[{"name":"Synopsys,Sunnyvale,USA"}]},{"given":"U. K.","family":"Bobbili","sequence":"additional","affiliation":[{"name":"Synopsys,Noida,India"}]},{"given":"D.","family":"Chakraborty","sequence":"additional","affiliation":[{"name":"Synopsys,Noida,India"}]},{"given":"D.","family":"Nguyen","sequence":"additional","affiliation":[{"name":"Synopsys,Ho-Chi-Minh,Vietnam"}]},{"given":"S.","family":"Sharma","sequence":"additional","affiliation":[{"name":"Synopsys,Noida,India"}]},{"given":"H.","family":"Harshul","sequence":"additional","affiliation":[{"name":"Synopsys,Noida,India"}]},{"given":"A.","family":"Dang","sequence":"additional","affiliation":[{"name":"Synopsys,Ho-Chi-Minh,Vietnam"}]}],"member":"263","reference":[{"volume-title":"15th MRAM Global Innovation Forum","key":"ref1"},{"volume-title":"Emerging-Non-Volatile Memory","year":"2023","key":"ref2"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2019.8662444"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/isscc.2018.8310393"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.23919\/VLSITechnologyandCir57934.2023.10185352"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC19947.2020.9062955"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM19574.2021.9720557"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42615.2023.10067837"}],"event":{"name":"2024 21st International SoC Design Conference (ISOCC)","start":{"date-parts":[[2024,8,19]]},"location":"Sapporo, Japan","end":{"date-parts":[[2024,8,22]]}},"container-title":["2024 21st International SoC Design Conference (ISOCC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/10761119\/10761994\/10762338.pdf?arnumber=10762338","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,1,10]],"date-time":"2025-01-10T19:50:24Z","timestamp":1736538624000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10762338\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,8,19]]},"references-count":8,"URL":"https:\/\/doi.org\/10.1109\/isocc62682.2024.10762338","relation":{},"subject":[],"published":{"date-parts":[[2024,8,19]]}}}