{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,24]],"date-time":"2025-10-24T16:39:27Z","timestamp":1761323967863,"version":"3.28.0"},"reference-count":27,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2013,6]]},"DOI":"10.1109\/isorc.2013.6913225","type":"proceedings-article","created":{"date-parts":[[2014,10,8]],"date-time":"2014-10-08T20:48:11Z","timestamp":1412801291000},"page":"1-8","source":"Crossref","is-referenced-by-count":26,"title":["A time-predictable stack cache"],"prefix":"10.1109","author":[{"given":"Sahar","family":"Abbaspour","sequence":"first","affiliation":[]},{"given":"Florian","family":"Brandner","sequence":"additional","affiliation":[]},{"given":"Martin","family":"Schoeberl","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"19","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS.2005.161"},{"key":"17","first-page":"443","article-title":"RISC I: A reduced instruction set VLSI computer","author":"patterson","year":"0","journal-title":"Proceedings of the 8th Annual Symposium on Computer Architecture ISCA '81"},{"key":"18","first-page":"371","article-title":"A time predictable instruction cache for a Java processor","author":"schoeberl","year":"2004","journal-title":"On the Move to Meaningful Internet Systems 2004 Workshop on Java Technologies for Real-Time and Embedded Systems (JTRES 2004) volume 3292 of LNCS"},{"key":"15","doi-asserted-by":"publisher","DOI":"10.1109\/MC.1982.1654133"},{"key":"16","doi-asserted-by":"publisher","DOI":"10.1145\/2465.214917"},{"key":"13","first-page":"1108","article-title":"A new cache architecture concept: The split temporal\/spatial cache","volume":"2","author":"milutinovic","year":"1996","journal-title":"Electrotechnical Conference 1996 MELECON '96 8th Mediterranean"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/40.592314"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1109\/ACSSC.2010.5757922"},{"key":"12","first-page":"255","article-title":"A method to improve the estimated worst-case performance of data caching","author":"lundqvist","year":"1999","journal-title":"Proc 6th International Conference on Real-Time Computing Systems and Applications"},{"key":"21","doi-asserted-by":"publisher","DOI":"10.1109\/STFSSD.2009.10"},{"key":"20","doi-asserted-by":"publisher","DOI":"10.1016\/j.sysarc.2007.06.001"},{"key":"22","doi-asserted-by":"publisher","DOI":"10.1109\/ACSSC.2010.5757923"},{"key":"23","doi-asserted-by":"publisher","DOI":"10.1007\/s11241-012-9159-8"},{"key":"24","first-page":"11","article-title":"Towards a time-predictable dual-issue microprocessor: The Patmos approach","author":"schoeberl","year":"2011","journal-title":"First Workshop on Bringing Theory to Practice Predictability and Performance in Embedded Systems (PPES 2011)"},{"key":"25","doi-asserted-by":"publisher","DOI":"10.1145\/1288940.1288974"},{"journal-title":"The Risc-v Instruction Set Manual Volume I Base User-level Isa","year":"2011","author":"waterman","key":"26"},{"key":"27","doi-asserted-by":"publisher","DOI":"10.1109\/DSD.2007.4341450"},{"journal-title":"DTU D 2 1 Software Simulator of Patmos","year":"2012","key":"3"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1145\/800050.801825"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2012.6378622"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1145\/291069.291010"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1145\/383082.383086"},{"key":"6","article-title":"MiBench: A free, commercially representative embedded benchmark suite","author":"guthaus","year":"2001","journal-title":"Proceedings of the IEEE 4th Annual Workshop on Workload Characterization"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1145\/224538.224622"},{"key":"4","doi-asserted-by":"crossref","first-page":"131","DOI":"10.1023\/A:1008186323068","article-title":"Efficient and precise cache behavior prediction for real-time systems","volume":"17","author":"ferdinand","year":"1999","journal-title":"Real-Time Systems"},{"journal-title":"Precision timed machines","year":"2012","author":"liu","key":"9"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1145\/1450095.1450117"}],"event":{"name":"2013 IEEE 16th International Symposium on Object\/Component\/Service-Oriented Real-Time Distributed Computing (ISORC)","start":{"date-parts":[[2013,6,19]]},"location":"Paderborn, Germany","end":{"date-parts":[[2013,6,21]]}},"container-title":["16th IEEE International Symposium on Object\/component\/service-oriented Real-time distributed Computing (ISORC 2013)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6906723\/6913188\/06913225.pdf?arnumber=6913225","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,22]],"date-time":"2017-06-22T22:03:51Z","timestamp":1498169031000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6913225\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,6]]},"references-count":27,"URL":"https:\/\/doi.org\/10.1109\/isorc.2013.6913225","relation":{},"subject":[],"published":{"date-parts":[[2013,6]]}}}