{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,9]],"date-time":"2025-06-09T14:28:50Z","timestamp":1749479330622},"reference-count":47,"publisher":"IEEE","license":[{"start":{"date-parts":[[2022,5,17]],"date-time":"2022-05-17T00:00:00Z","timestamp":1652745600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2022,5,17]],"date-time":"2022-05-17T00:00:00Z","timestamp":1652745600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2022,5,17]]},"DOI":"10.1109\/isorc52572.2022.9812711","type":"proceedings-article","created":{"date-parts":[[2022,7,6]],"date-time":"2022-07-06T19:42:30Z","timestamp":1657136550000},"source":"Crossref","is-referenced-by-count":6,"title":["Denial-of-Service Attacks on Shared Resources in Intel\u2019s Integrated CPU-GPU Platforms"],"prefix":"10.1109","author":[{"given":"Michael","family":"Bechtel","sequence":"first","affiliation":[{"name":"University of Kansas,USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Heechul","family":"Yun","sequence":"additional","affiliation":[{"name":"University of Kansas,USA"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1145\/3316781.3317840"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/RTSS46320.2019.00042"},{"key":"ref33","article-title":"Leveraging Hardware QoS to Control Contention in the Xilinx Zynq UltraScale+ MPSoC","author":"serrano-cases","year":"2021","journal-title":"ECRTS"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/RTCSA.2019.8864564"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/RTAS48715.2020.00006"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1145\/339647.339668"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/RTAS.2016.7461361"},{"key":"ref36","article-title":"Parboil: A Revised Benchmark Suite for Scientific and Commercial Throughput Computing","author":"stratton","year":"2012","journal-title":"Center for Reliable and High-Performance Computing"},{"key":"ref35","year":"0","journal-title":"SPEC CPU2017"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/RTSS49844.2020.00039"},{"key":"ref10","article-title":"Deterministic Memory Abstraction and Supporting Multicore System Architecture","author":"farshchi","year":"2018","journal-title":"ECRTS"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/SP40000.2020.00090"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/RTAS.2019.00036"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/RTAS52030.2021.00024"},{"key":"ref13","article-title":"Industrial Challenges: Moving From Classical to High Performance Real-Time Systems","author":"hamann","year":"2018","journal-title":"Watershed"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2016.7446102"},{"key":"ref15","year":"0"},{"key":"ref16","year":"0","journal-title":"Hard Iron Meets Artificial Intelligence"},{"key":"ref17","year":"0","journal-title":"IntelR Processors with Integrated Graphics"},{"key":"ref18","year":"0","journal-title":"IntelR Resource Director Technology (IntelR RDT) Framework"},{"key":"ref19","year":"0","journal-title":"Software Optimization for IntelR GPUs (NEW)"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/RTAS48715.2020.00007"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/RTAS.2017.3"},{"key":"ref3","year":"0","journal-title":"ARM Memory System Resource Partitioning and Monitoring (MPAM) for Armv8-A"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1145\/3453417.3453432"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/RTAS.2019.00037"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2021.3108044"},{"key":"ref29","article-title":"DRAMA: Exploiting DRAM Addressing for Cross-CPU Attacks","author":"pessl","year":"2016","journal-title":"USENIX Security Symposium"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ETFA.2017.8247615"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/RTCSA50079.2020.9203722"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/RTSS52674.2021.00048"},{"key":"ref9","author":"cutress","year":"0","journal-title":"AMD Expanding Into Tesla Model 3 and Model Y"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/RTSS.2017.00017"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1109\/RTAS.2018.00028"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/RTAS48715.2020.000-6"},{"key":"ref45","article-title":"MemGuard: Memory Bandwidth Reservation System for Efficient Performance Isolation in Multi-core Platforms","author":"yun","year":"2013","journal-title":"RTAS"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1007\/s11241-017-9272-9"},{"key":"ref47","article-title":"Profiling and Controlling I\/O-Related Memory Contention in COTS Heterogeneous Platforms","author":"zini","year":"2021","journal-title":"Software Practice and Experience"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/ECRTS.2013.19"},{"key":"ref24","article-title":"Memory Performance Attacks: Denial of Memory Service in Multi-Core Systems","author":"moscibroda","year":"2007","journal-title":"USENIX Security Symposium"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1109\/RTAS.2019.00033"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/RTAS.2013.6531078"},{"key":"ref41","article-title":"Avoiding Pitfalls When Using NVIDIA GPUs for Real-Time Tasks in Autonomous Systems","author":"yang","year":"2018","journal-title":"ECRTS"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1109\/RTAS.2014.6925999"},{"key":"ref26","article-title":"AMD GPUs as an Alternative to NVIDIA for Supporting Real-Time Workloads","author":"otterness","year":"2020","journal-title":"ECRTS"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/RTAS48715.2020.000-5"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1145\/2628071.2628104"}],"event":{"name":"2022 IEEE 25th International Symposium On Real-Time Distributed Computing (ISORC)","location":"V\u00e4ster\u00e5s, Sweden","start":{"date-parts":[[2022,5,17]]},"end":{"date-parts":[[2022,5,18]]}},"container-title":["2022 IEEE 25th International Symposium On Real-Time Distributed Computing (ISORC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9812705\/9812710\/09812711.pdf?arnumber=9812711","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,8,5]],"date-time":"2022-08-05T00:45:56Z","timestamp":1659660356000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9812711\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,5,17]]},"references-count":47,"URL":"https:\/\/doi.org\/10.1109\/isorc52572.2022.9812711","relation":{},"subject":[],"published":{"date-parts":[[2022,5,17]]}}}