{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T02:42:33Z","timestamp":1725417753892},"reference-count":9,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2011,12]]},"DOI":"10.1109\/ispacs.2011.6146123","type":"proceedings-article","created":{"date-parts":[[2012,2,7]],"date-time":"2012-02-07T16:14:35Z","timestamp":1328631275000},"page":"1-5","source":"Crossref","is-referenced-by-count":0,"title":["Low power design and dynamic power management system for VLIW DSP subsystem"],"prefix":"10.1109","author":[{"family":"Hsien-Ching Hsieh","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"family":"Shui-An Wen","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"family":"Che-Yu Liao","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"family":"Huang-Lun Lin","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"family":"Po-Han Huang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"family":"Shing-Wu Tung","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"journal-title":"Industrial Technology Research Institute","article-title":"Low Power Implementation & Measurement for ITRI 65nm PACDSP","year":"2010","key":"ref4"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ICME.2006.262455"},{"year":"2009","key":"ref6","article-title":"Implementing Multivoltage Designs Using RTL Isolation and Power Constructs Version C-2009.06"},{"journal-title":"Synopsys Low-Power Flow User Guide Version C–2009 06","year":"2009","key":"ref5"},{"key":"ref8","article-title":"A novel programmable digital signal processor for multimedia applications","author":"lin","year":"2004","journal-title":"Proc APCCAS"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/VDAT.2007.373214"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1007\/s11265-007-0061-x"},{"key":"ref9","article-title":"Energy-effective design & implementation of an embedded VLIW DSP","author":"hsieh","year":"2008","journal-title":"Proc ISOCC"},{"key":"ref1","article-title":"Overview of ITRI PAC project “from VLIW DSP processor to multicore computing platform","author":"lin","year":"2008","journal-title":"Proc VLSI"}],"event":{"name":"2011 International Symposium on Intelligent Signal Processing and Communications Systems (ISPACS 2011)","start":{"date-parts":[[2011,12,7]]},"location":"Chiang Mai, Thailand","end":{"date-parts":[[2011,12,9]]}},"container-title":["2011 International Symposium on Intelligent Signal Processing and Communications Systems (ISPACS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/6138394\/6146047\/06146123.pdf?arnumber=6146123","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,21]],"date-time":"2017-03-21T11:49:51Z","timestamp":1490096991000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6146123\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,12]]},"references-count":9,"URL":"https:\/\/doi.org\/10.1109\/ispacs.2011.6146123","relation":{},"subject":[],"published":{"date-parts":[[2011,12]]}}}