{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,30]],"date-time":"2024-10-30T08:08:15Z","timestamp":1730275695331,"version":"3.28.0"},"reference-count":16,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2012,11]]},"DOI":"10.1109\/ispacs.2012.6473567","type":"proceedings-article","created":{"date-parts":[[2013,3,20]],"date-time":"2013-03-20T14:50:57Z","timestamp":1363791057000},"page":"636-639","source":"Crossref","is-referenced-by-count":6,"title":["A 5-GS\/s 46-dBc SFDR track and hold amplifier"],"prefix":"10.1109","author":[{"given":"Hsin-Liang","family":"Chen","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Su-Chun","family":"Cheng","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Bo-Wei","family":"Chen","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"doi-asserted-by":"publisher","key":"15","DOI":"10.1109\/JSSC.2003.815926"},{"doi-asserted-by":"publisher","key":"16","DOI":"10.1109\/4.760369"},{"doi-asserted-by":"publisher","key":"13","DOI":"10.1049\/el:20060247"},{"key":"14","article-title":"A 20GS\/s 1.2 V 0.13 um CMOS switched cascode track-and-hold amplifier","volume":"57","author":"orser","year":"2010","journal-title":"IEEE TCAS-II"},{"doi-asserted-by":"publisher","key":"11","DOI":"10.1109\/JSSC.2008.2010786"},{"key":"12","first-page":"180","article-title":"differentially pre-compensated ghz-range low-voltage track-and-hold","volume":"39","author":"tchamov","year":"2003","journal-title":"Electronics Letters"},{"doi-asserted-by":"publisher","key":"3","DOI":"10.1109\/VLSIC.2010.5560315"},{"key":"2","article-title":"A 4GSample\/s 8b ADC in 0.35-um CMOS","author":"poulton","year":"2002","journal-title":"IEEE ISSCC"},{"key":"1","article-title":"A 20GS\/s 8b ADC with a 1MB memory in 0.18um CMOS","author":"poulton","year":"2003","journal-title":"IEEE ISSCC"},{"doi-asserted-by":"publisher","key":"10","DOI":"10.1109\/CICC.2006.320891"},{"doi-asserted-by":"publisher","key":"7","DOI":"10.1109\/JSSC.2011.2164961"},{"doi-asserted-by":"publisher","key":"6","DOI":"10.1109\/VLSIC.2008.4585934"},{"doi-asserted-by":"publisher","key":"5","DOI":"10.1109\/4.972135"},{"key":"4","first-page":"29","article-title":"A 6-bit, 1.2-GS\/s dual channel ADC in 0.13-um CMOS for MB-OFDM UWB receivers","author":"hsien","year":"2008","journal-title":"IEEE ICUWB"},{"key":"9","first-page":"347","article-title":"4-Gb\/s track and hold circuit using parasitic capacitance canceller","author":"sato","year":"2004","journal-title":"Proc 30th Eur Solid-State Circuits Con ESSCIRC 2004"},{"doi-asserted-by":"publisher","key":"8","DOI":"10.1109\/ESSCIR.2004.1356688"}],"event":{"name":"2012 International Symposium on Intelligent Signal Processing and Communications Systems (ISPACS 2012)","start":{"date-parts":[[2012,11,4]]},"location":"Tamsui, New Taipei City, Taiwan","end":{"date-parts":[[2012,11,7]]}},"container-title":["2012 International Symposium on Intelligent Signal Processing and Communications Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6470430\/6473441\/06473567.pdf?arnumber=6473567","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,22]],"date-time":"2017-03-22T17:31:33Z","timestamp":1490203893000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6473567\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,11]]},"references-count":16,"URL":"https:\/\/doi.org\/10.1109\/ispacs.2012.6473567","relation":{},"subject":[],"published":{"date-parts":[[2012,11]]}}}