{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T05:27:39Z","timestamp":1729661259725,"version":"3.28.0"},"reference-count":11,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2012,11]]},"DOI":"10.1109\/ispacs.2012.6473600","type":"proceedings-article","created":{"date-parts":[[2013,3,20]],"date-time":"2013-03-20T14:50:57Z","timestamp":1363791057000},"page":"798-801","source":"Crossref","is-referenced-by-count":1,"title":["Low power design flow with static and statistical timing analysis"],"prefix":"10.1109","author":[{"given":"Ko-Chi","family":"Kuo","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Hsueh-Ta","family":"Ko","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2001.915268"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/92.532035"},{"journal-title":"The Classical Moment Problem and Some Related Questions in Analysis","year":"1965","author":"akhiezer","key":"10"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1145\/1142155.1142158"},{"key":"7","first-page":"119","article-title":"Design of standard cells used low power ASIC's exploiting the multiple-supply-voltage scheme","author":"wang","year":"1998","journal-title":"Proceeding IEEE IASICC"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2008.923241"},{"key":"5","first-page":"271","article-title":"Statistical delay computation considering spatial correlations","author":"agarwal","year":"2003","journal-title":"Proceedings of the Asia and South Pacific Design Automation Conference"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2003.159781"},{"key":"9","first-page":"58","article-title":"Uncertainty aware circuit optimization","author":"bai","year":"2002","journal-title":"Proc IEEE Design Automation Conference"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/43.998626"},{"key":"11","doi-asserted-by":"crossref","first-page":"926","DOI":"10.1109\/TVLSI.2004.833667","article-title":"High performance level conversion for dual-VDD design","volume":"12","author":"kulkarni","year":"2004","journal-title":"IEEE Tran On Very Large Scale Integration (VLSI) Systems"}],"event":{"name":"2012 International Symposium on Intelligent Signal Processing and Communications Systems (ISPACS 2012)","start":{"date-parts":[[2012,11,4]]},"location":"Tamsui, New Taipei City, Taiwan","end":{"date-parts":[[2012,11,7]]}},"container-title":["2012 International Symposium on Intelligent Signal Processing and Communications Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6470430\/6473441\/06473600.pdf?arnumber=6473600","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,21]],"date-time":"2017-06-21T05:44:16Z","timestamp":1498023856000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6473600\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,11]]},"references-count":11,"URL":"https:\/\/doi.org\/10.1109\/ispacs.2012.6473600","relation":{},"subject":[],"published":{"date-parts":[[2012,11]]}}}