{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,2,13]],"date-time":"2025-02-13T05:09:53Z","timestamp":1739423393826,"version":"3.37.0"},"reference-count":8,"publisher":"IEEE","license":[{"start":{"date-parts":[[2024,12,10]],"date-time":"2024-12-10T00:00:00Z","timestamp":1733788800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2024,12,10]],"date-time":"2024-12-10T00:00:00Z","timestamp":1733788800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2024,12,10]]},"DOI":"10.1109\/ispacs62486.2024.10869272","type":"proceedings-article","created":{"date-parts":[[2025,2,11]],"date-time":"2025-02-11T18:19:40Z","timestamp":1739297980000},"page":"1-5","source":"Crossref","is-referenced-by-count":0,"title":["A Minimum Value Determination Circuit Using a Neuron CMOS WTA with FGC Circuit"],"prefix":"10.1109","author":[{"given":"Naruaki","family":"Hokari","sequence":"first","affiliation":[{"name":"Tokai University,Graduate School of Information and Telecommunication Engineering,Tokyo,Japan"}]},{"given":"Hisaya","family":"Sawada","sequence":"additional","affiliation":[{"name":"Tokai University,Graduate School of Information and Telecommunication Engineering,Tokyo,Japan"}]},{"given":"Hirotaka","family":"Furukawa","sequence":"additional","affiliation":[{"name":"Tokai University,Graduate School of Information and Telecommunication Engineering,Tokyo,Japan"}]},{"given":"Tatsuya","family":"Hasegawa","sequence":"additional","affiliation":[{"name":"Tokai University,Graduate School of Information and Telecommunication Engineering,Tokyo,Japan"}]},{"given":"Daishi","family":"Nishiguchi","sequence":"additional","affiliation":[{"name":"Tokai University,Research Institute of Science and Technology,Kumamoto,Japan"}]},{"given":"Masaaki","family":"Fukuhara","sequence":"additional","affiliation":[{"name":"Tokai University,Graduate School of Information and Telecommunication Engineering,Tokyo,Japan"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1007\/11599517_48"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/MUE.2007.165"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ICHIT.2006.253514"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ISPACS48206.2019.8986312"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.1993.280034"},{"key":"ref6","article-title":"Application of a Minimum Value Determination Circuit using Neuron CMOS Type WTA for a DTW Distance Calculator","author":"Hokair","year":"2024","journal-title":"Institute of electoronics Information and Communication Engineers, C-12-03"},{"issue":"3","key":"ref7","first-page":"338","article-title":"Stream Processing under the Dynamic Time Warping Distance","volume":"92","author":"Sakurai","year":"2009","journal-title":"The IEICE transactions on information and systems"},{"issue":"4","key":"ref8","first-page":"129","article-title":"An Electronic Neuron Using Interconnect Capacitance and Applied to a Variable Logic Circuit","volume":"J105-C","author":"Nishiguchi","year":"2022"}],"event":{"name":"2024 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS)","start":{"date-parts":[[2024,12,10]]},"location":"Kaohsiung, Taiwan","end":{"date-parts":[[2024,12,13]]}},"container-title":["2024 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/10867836\/10865985\/10869272.pdf?arnumber=10869272","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,2,12]],"date-time":"2025-02-12T06:41:09Z","timestamp":1739342469000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10869272\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,12,10]]},"references-count":8,"URL":"https:\/\/doi.org\/10.1109\/ispacs62486.2024.10869272","relation":{},"subject":[],"published":{"date-parts":[[2024,12,10]]}}}