{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,7,2]],"date-time":"2025-07-02T12:45:56Z","timestamp":1751460356267},"reference-count":25,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2009,4]]},"DOI":"10.1109\/ispass.2009.4919640","type":"proceedings-article","created":{"date-parts":[[2009,5,11]],"date-time":"2009-05-11T18:22:49Z","timestamp":1242066169000},"page":"77-88","source":"Crossref","is-referenced-by-count":27,"title":["Exploring speculative parallelism in SPEC2006"],"prefix":"10.1109","author":[{"given":"Venkatesan","family":"Packirisamy","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Antonia","family":"Zhai","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"family":"Wei-Chung Hsu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Pen-Chung","family":"Yew","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Tin-Fook","family":"Ngai","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"year":"0","key":"19"},{"key":"17","doi-asserted-by":"publisher","DOI":"10.1145\/1088149.1088173"},{"key":"18","article-title":"exploiting speculative thread-level parallelism in data compression applications","author":"wang","year":"2006","journal-title":"The 19th International Workshop on Languages and Compilers for Parallel Computing"},{"key":"15","doi-asserted-by":"publisher","DOI":"10.1109\/PACT.2001.953302"},{"key":"16","doi-asserted-by":"crossref","DOI":"10.1145\/1183401.1183407","article-title":"on the performance potential of different types of speculative threadlevel parallelism","author":"kejariwal","year":"2006","journal-title":"20th Annual ACM International Conference on Supercomputing"},{"article-title":"compiler techniques for thread-level speculation","year":"2007","author":"wang","key":"13"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/PACT.1999.807576"},{"journal-title":"The SPEC CPU 2006 Benchmark Suite","year":"0","key":"11"},{"key":"12","article-title":"tight analysis of the performance potential of thread speculation using spec cpu 2006","author":"kejariwal","year":"2007","journal-title":"ACM SIGPLAN 2007 Symposium on Principles and Practice of Parallel Programming"},{"key":"21","doi-asserted-by":"publisher","DOI":"10.1145\/1345206.1345251"},{"key":"20","article-title":"loop selection for thread-level speculation","author":"wang","year":"2005","journal-title":"The 18th International Workshop on Languages and Compilers for Parallel Computing"},{"year":"0","key":"22"},{"key":"23","doi-asserted-by":"publisher","DOI":"10.1145\/1065010.1065034"},{"journal-title":"Intel c\ufffd\ufffd compiler","year":"0","key":"24"},{"key":"25","doi-asserted-by":"publisher","DOI":"10.1109\/12.29467"},{"journal-title":"Intel' s Dual-Core Processor for Desktop PCs","year":"2005","key":"3"},{"year":"0","key":"2"},{"key":"10","article-title":"posh: a tls compiler that exploits program structure","author":"liu","year":"2006","journal-title":"ACM SIGPLAN 2006 Symposium on Principles and Practice of Parallel Programming"},{"year":"0","key":"1"},{"key":"7","doi-asserted-by":"crossref","DOI":"10.1145\/605397.605416","article-title":"compiler optimization of scalar value communication between speculative threads","author":"zhai","year":"2002","journal-title":"10th Int'l Conference on Architectural Support for Programming Languages and Operating Systems (ASP-LOS X)"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1145\/1082469.1082471"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/12.795219"},{"journal-title":"Leading the Industry Multi-core Technology & Dual-Core Processors from AMD","year":"2005","key":"4"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1145\/996841.996852"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/CGO.2004.1281662"}],"event":{"name":"Software (ISPASS)","start":{"date-parts":[[2009,4,26]]},"location":"Boston, MA, USA","end":{"date-parts":[[2009,4,28]]}},"container-title":["2009 IEEE International Symposium on Performance Analysis of Systems and Software"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4907867\/4919623\/04919640.pdf?arnumber=4919640","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,10,5]],"date-time":"2021-10-05T05:32:08Z","timestamp":1633411928000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/4919640\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2009,4]]},"references-count":25,"URL":"https:\/\/doi.org\/10.1109\/ispass.2009.4919640","relation":{},"subject":[],"published":{"date-parts":[[2009,4]]}}}