{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T10:53:08Z","timestamp":1725619988674},"reference-count":24,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010,3]]},"DOI":"10.1109\/ispass.2010.5452017","type":"proceedings-article","created":{"date-parts":[[2010,4,26]],"date-time":"2010-04-26T13:37:19Z","timestamp":1272289039000},"page":"223-234","source":"Crossref","is-referenced-by-count":10,"title":["Performance-effective operation below Vcc-min"],"prefix":"10.1109","author":[{"given":"Nikolas","family":"Ladas","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yiannakis","family":"Sazeides","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Veerle","family":"Desmet","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.1990.134547"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2007.19"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/1283780.1283818"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1147\/rd.516.0639"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI.2007.81"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1145\/800046.801645"},{"key":"ref16","doi-asserted-by":"crossref","first-page":"76","DOI":"10.1145\/280756.280790","article-title":"The simulation and evaluation of dynamic voltage scaling algorithms","author":"pering","year":"1998","journal-title":"Proceedings 1998 International Symposium on Low Power Electronics and Design (IEEE Cat No 98TH8379) LPE"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/12.210168"},{"key":"ref18","doi-asserted-by":"crossref","first-page":"544","DOI":"10.1145\/1080695.1070015","article-title":"The V-way cache: Demand based associativity via global replacement","author":"qureshi","year":"2005","journal-title":"Proc 32nd Int'l Symp Computer Architecture"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/12.21141"},{"key":"ref4","article-title":"Tutorial on design variability: Trends, models and design solutions","author":"bowman","year":"2008","journal-title":"Tutorial at MICRO"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/775832.775920"},{"key":"ref6","first-page":"1","author":"desikan","year":"2001","journal-title":"Sim-alpha A validated execution driven alpha 21264 simulator"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2008.4771807"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2002.1003579"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2003.1253179"},{"journal-title":"AMD Family 10th Phenom&#x2122;II processor","year":"2009","key":"ref2"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2004.840407"},{"journal-title":"White Paper","article-title":"Intel. First the tick, now the tock: Next generation Intel@Microarchitecture (Nehalem)","year":"2008","key":"ref9"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/12.589235"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2008.22"},{"journal-title":"Technical Report ITRS","article-title":"The International Technology Roadmap for Semiconductors","year":"2007","key":"ref21"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-30102-8_2"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1145\/359461.359475"}],"event":{"name":"Software (ISPASS)","start":{"date-parts":[[2010,3,28]]},"location":"White Plains, NY, USA","end":{"date-parts":[[2010,3,30]]}},"container-title":["2010 IEEE International Symposium on Performance Analysis of Systems &amp; Software (ISPASS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5446240\/5452012\/05452017.pdf?arnumber=5452017","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,19]],"date-time":"2017-06-19T03:33:03Z","timestamp":1497843183000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5452017\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,3]]},"references-count":24,"URL":"https:\/\/doi.org\/10.1109\/ispass.2010.5452017","relation":{},"subject":[],"published":{"date-parts":[[2010,3]]}}}