{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,2,20]],"date-time":"2025-02-20T06:40:03Z","timestamp":1740033603660,"version":"3.37.3"},"reference-count":36,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010,3]]},"DOI":"10.1109\/ispass.2010.5452068","type":"proceedings-article","created":{"date-parts":[[2010,4,26]],"date-time":"2010-04-26T17:37:19Z","timestamp":1272303439000},"page":"45-54","source":"Crossref","is-referenced-by-count":4,"title":["ArchExplorer.org: A methodology for facilitating a fair Comparison of research ideas"],"prefix":"10.1109","author":[{"given":"Veerle","family":"Desmet","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sylvain","family":"Girbal","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Olivier","family":"Temam","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.1993.698558"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2006.16"},{"key":"ref31","doi-asserted-by":"crossref","first-page":"305","DOI":"10.3233\/EMC-2005-00034","article-title":"Multi-objective design space exploration of embedded systems","volume":"1","author":"palermo","year":"2005","journal-title":"J Embedded Comput"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2004.10030"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2002.1176256"},{"journal-title":"Cacti 4 0 technical report Technical report HP Labs","year":"2006","author":"tarjan","key":"ref35"},{"key":"ref34","first-page":"1473","volume":"14","author":"smith","year":"1982","journal-title":"Cache Memories Computing Surveys"},{"journal-title":"Overview of the Ptolemy Project","year":"1999","author":"davis","key":"ref10"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2007.12"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/2.982918"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.1997.604727"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/1065910.1065922"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2004.25"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/WWC.2001.990739"},{"key":"ref17","article-title":"SimPoint 3.0: Faster and more flexible program analysis","author":"hamerly","year":"2005","journal-title":"Proc Workshop Modeling Benchmarking and Simulation (MoBS 05)"},{"key":"ref18","doi-asserted-by":"crossref","first-page":"31","DOI":"10.1145\/1054907.1054914","article-title":"Simflex: a fast, accurate, flexible full-system simulation framework for performance evaluation of server architecture","volume":"31","author":"hardavellas","year":"2004","journal-title":"SIGMETRICS Perform Eval Rev"},{"key":"ref19","doi-asserted-by":"crossref","first-page":"24","DOI":"10.1145\/1105734.1105739","article-title":"Exploring the cache design space for large scale CMPs","volume":"33","author":"hsu","year":"2005","journal-title":"SIGArch Computer Architecture News"},{"key":"ref28","doi-asserted-by":"crossref","first-page":"92","DOI":"10.1145\/1105734.1105747","article-title":"Multifacet's general execution-driven multiprocessor simulator (GEMS) toolset","volume":"33","author":"martin","year":"2005","journal-title":"Computer Architecture News"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/L-CA.2007.12"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2006.1598109"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/CGO.2006.37"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2006.82"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/125826.125932"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1145\/1183401.1183428"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/605397.605427"},{"key":"ref7","doi-asserted-by":"crossref","first-page":"265","DOI":"10.1145\/223982.224437","article-title":"Skewed associativity enhances performance predictability","author":"bodin","year":"1995","journal-title":"Proceedings 22nd Annual International Symposium on Computer Architecture ISCA"},{"year":"2006","key":"ref2"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1023\/A:1015729001611"},{"journal-title":"Technical Report","year":"2003","key":"ref1"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2002.1003579"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1145\/1168857.1168882"},{"journal-title":"PowerPC 405 CPU Core","year":"2006","key":"ref21"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1145\/1403375.1403721"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.1990.134547"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1145\/1168857.1168881"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1145\/379240.379259"}],"event":{"name":"Software (ISPASS)","start":{"date-parts":[[2010,3,28]]},"location":"White Plains, NY, USA","end":{"date-parts":[[2010,3,30]]}},"container-title":["2010 IEEE International Symposium on Performance Analysis of Systems & Software (ISPASS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5446240\/5452012\/05452068.pdf?arnumber=5452068","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,2,20]],"date-time":"2025-02-20T06:11:51Z","timestamp":1740031911000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5452068\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,3]]},"references-count":36,"URL":"https:\/\/doi.org\/10.1109\/ispass.2010.5452068","relation":{},"subject":[],"published":{"date-parts":[[2010,3]]}}}