{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,5,27]],"date-time":"2026-05-27T06:09:36Z","timestamp":1779862176703,"version":"3.53.1"},"reference-count":17,"publisher":"IEEE","license":[{"start":{"date-parts":[[2026,4,26]],"date-time":"2026-04-26T00:00:00Z","timestamp":1777161600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2026,4,26]],"date-time":"2026-04-26T00:00:00Z","timestamp":1777161600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2026,4,26]]},"DOI":"10.1109\/ispass69572.2026.00069","type":"proceedings-article","created":{"date-parts":[[2026,5,26]],"date-time":"2026-05-26T19:39:19Z","timestamp":1779824359000},"page":"650-652","source":"Crossref","is-referenced-by-count":0,"title":["VCSR-MM: A Bandwidth-Optimized SpMM Design for Modern GPUs"],"prefix":"10.1109","author":[{"given":"Mouad","family":"Tiahi","sequence":"first","affiliation":[{"name":"Northeastern University Boston,Khoury College of Computer Science,MA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Elmira","family":"Karimi","sequence":"additional","affiliation":[{"name":"Northeastern University Boston,Dept. of Electrical and Computer Engineering,MA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"David","family":"Kaeli","sequence":"additional","affiliation":[{"name":"Northeastern University Boston,Dept. of Electrical and Computer Engineering,MA"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/2049662.2049663"},{"key":"ref2","article-title":"cuSPARSE Library","year":"2014"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/3293883.3295712"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/3719276.3725173"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1073\/pnas.2101784118"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/CVPRW63382.2024.00799"},{"key":"ref7","article-title":"Efficient Sparse Matrix-Vector Multiplication on CUDA","volume-title":"NVIDIA Technical Report NVR-2008-004, NVIDIA Corporation, Tech. Rep.","author":"Bell","year":"2008"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/1654059.1654078"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/SC41405.2020.00076"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/3620666.3651378"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-96983-1_48"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2022.3177291"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS51385.2021.00016"},{"key":"ref14","article-title":"Cuda c++ best practices guide","year":"2025","journal-title":"NVIDIA Documentation"},{"key":"ref15","article-title":"NVIDIA A100 Tensor Core GPU Architecture","year":"2020"},{"key":"ref16","article-title":"NVIDIA Hopper H100 GPU Architecture","year":"2022"},{"key":"ref17","article-title":"NVIDIA H200 Tensor Core GPU","year":"2023","journal-title":"Product Brief"}],"event":{"name":"2026 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS)","location":"Seoul, Korea, Republic of","start":{"date-parts":[[2026,4,26]]},"end":{"date-parts":[[2026,4,28]]}},"container-title":["2026 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/11527204\/11527232\/11527293.pdf?arnumber=11527293","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,5,27]],"date-time":"2026-05-27T05:59:55Z","timestamp":1779861595000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11527293\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2026,4,26]]},"references-count":17,"URL":"https:\/\/doi.org\/10.1109\/ispass69572.2026.00069","relation":{},"subject":[],"published":{"date-parts":[[2026,4,26]]}}}