{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,19]],"date-time":"2025-03-19T11:09:45Z","timestamp":1742382585948,"version":"3.28.0"},"reference-count":13,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/ispdc.2003.1267672","type":"proceedings-article","created":{"date-parts":[[2004,7,8]],"date-time":"2004-07-08T16:05:44Z","timestamp":1089302744000},"page":"258-265","source":"Crossref","is-referenced-by-count":1,"title":["Hardware-based power management for real-time applications"],"prefix":"10.1109","author":[{"given":"S.","family":"Uhrig","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"T.","family":"Ungerer","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"crossref","first-page":"199","DOI":"10.1109\/ICCD.2000.878286","article-title":"Power-sensitive multithreaded architecture","author":"seng","year":"0","journal-title":"2000 IEEE International Conference on Computer Design VLSI in Computers and Processors"},{"key":"ref11","article-title":"Intra-task voltage scheduling for low-energy hard real-time applications","volume":"18","author":"shin","year":"2001","journal-title":"IEEE Design and Test of Computers"},{"year":"2002","key":"ref12"},{"key":"ref13","first-page":"57","article-title":"Implementing real-time scheduling within a multithreaded java microcontroller","author":"uhrig","year":"0","journal-title":"35th International Symposium on Microarchitecture (MICRO-35) 6th Workshop on Multithreaded Execution Architecture and Compilation (MTEAC-6)"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2005.855964"},{"journal-title":"Intel PXA26x Processor Family Developer's Manual","year":"2002","key":"ref3"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/RTCSA.2000.896384"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1016\/S0141-9331(02)00082-0"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/381677.381701"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/502034.502044"},{"key":"ref2","first-page":"26","article-title":"Power-aware Microarchitecture","volume":"20","author":"brooks","year":"2000","journal-title":"Designing and Modeling Challenges for Next-generation Microprocessors"},{"key":"ref1","first-page":"334","article-title":"A Scheduling Technique Providing a Strict Isolation of Realtime Threads","author":"brinkschulte","year":"0","journal-title":"Seventh IEEE International Workshop on Object-oriented Real-time Dependable Systems (WORDS)"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/LPE.2001.945367"}],"event":{"name":"Second International Symposium on Parallel and Distributed Computing, 2003.","location":"Ljubljana, Slovenia"},"container-title":["Second International Symposium on Parallel and Distributed Computing, 2003. Proceedings."],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8946\/28341\/01267672.pdf?arnumber=1267672","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,16]],"date-time":"2017-06-16T04:40:07Z","timestamp":1497588007000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1267672\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":13,"URL":"https:\/\/doi.org\/10.1109\/ispdc.2003.1267672","relation":{},"subject":[]}}